SLVSDD7A September 2016 – February 2019 UCD9090A
Closed-loop margining uses a PWM or FPWM output for each power supply that is being margined. An external RC network converts the FPWM pulse train into a DC margining voltage. The margining voltage is connected to the appropriate power supply feedback node through a resistor. The power supply output voltage is monitored, and the margining voltage is controlled by adjusting the PWM duty cycle until the power supply output voltage reaches the margin-low and margin-high voltages set by the user. The voltage setting resolutions will be the same that applies to the voltage measurement resolution (Table 3). The closed loop margining can operate in several modes (Table 8). Given that this closed-loop system has feed back through the ADC, the closed-loop margining accuracy will be dominated by the ADC measurement. The relationship between duty cycle and margined voltage is configurable so that voltage increases when duty cycle increases or decreases. For more details on configuring the UCD9090A for margining, see the Voltage Margining Using the UCD9012x application note (SLVA375).
|DISABLE||Margining is disabled.|
|ENABLE_TRI_STATE||When not margining, the PWM pin is set to high impedance state.|
|ENABLE_ACTIVE_TRIM||When not margining, the PWM duty-cycle is continuously adjusted to keep the voltage at VOUT_COMMAND.|
|ENABLE_FIXED_DUTY_CYCLE||When not margining, the PWM duty-cycle is set to a fixed duty-cycle.|