SLVSDD7A September 2016 – February 2019 UCD9090A
A GPI and GPO can be configured as a watchdog timer (WDT). The WDT can be independent of power supply sequencing or tied to a GPIO functioning as a watchdog output (WDO) that is configured to provide a system-reset signal. The WDT can be reset by toggling a watchdog input (WDI) pin or by writing to SYSTEM_WATCHDOG_RESET over I2C. The WDI and WDO pins are optional when using the watchdog timer. The WDI can be replaced by SYSTEM_WATCHDOG_RESET command and the WDO can be manifested through the Boolean Logic defined GPOs or through the System Reset function.
The WDT can be active immediately at power up or set to wait while the system initializes. Table 10 lists the programmable wait times before the initial timeout sequence begins.
|WDT INITIAL WAIT TIME|
The watchdog timeout is programmable from 0.001s to 32.256s. See the UCD90xxx Sequencer and System Health Controller PMBus Command Reference for details on configuring the watchdog timeout. If the WDT times out, the UCD9090A can assert a GPIO pin configured as WDO that is separate from a GPIO defined as system-reset pin, or it can generate a system-reset pulse. After a timeout, the WDT is restarted by toggling the WDI pin or by writing to SYSTEM_WATCHDOG_RESET over I2C.