SWRS170I August   2014  – October 2017 WL1807MOD , WL1837MOD

PRODUCTION DATA.  

  1. 1Device Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagram
  2. 2Revision History
  3. 3Device Comparison
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Attributes
  5. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  External Digital Slow Clock Requirements
    5. 5.5  Thermal Resistance Characteristics for MOC 100-Pin Package
    6. 5.6  WLAN Performance: 2.4-GHz Receiver Characteristics
    7. 5.7  WLAN Performance: 2.4-GHz Transmitter Power
    8. 5.8  WLAN Performance: 5-GHz Receiver Characteristics
    9. 5.9  WLAN Performance: 5-GHz Transmitter Power
    10. 5.10 WLAN Performance: Currents
    11. 5.11 Bluetooth Performance: BR, EDR Receiver Characteristics—In-Band Signals
    12. 5.12 Bluetooth Performance: Transmitter, BR
    13. 5.13 Bluetooth Performance: Transmitter, EDR
    14. 5.14 Bluetooth Performance: Modulation, BR
    15. 5.15 Bluetooth Performance: Modulation, EDR
    16. 5.16 Bluetooth low energy Performance: Receiver Characteristics - In-Band Signals
    17. 5.17 Bluetooth low energy Performance: Transmitter Characteristics
    18. 5.18 Bluetooth low energy Performance: Modulation Characteristics
    19. 5.19 Bluetooth BR and EDR Dynamic Currents
    20. 5.20 Bluetooth low energy Currents
    21. 5.21 Timing and Switching Characteristics
      1. 5.21.1 Power Management
        1. 5.21.1.1 Block Diagram - Internal DC-DCs
      2. 5.21.2 Power-Up and Shut-Down States
      3. 5.21.3 Chip Top-level Power-Up Sequence
      4. 5.21.4 WLAN Power-Up Sequence
      5. 5.21.5 Bluetooth-Bluetooth low energy Power-Up Sequence
      6. 5.21.6 WLAN SDIO Transport Layer
        1. 5.21.6.1 SDIO Timing Specifications
        2. 5.21.6.2 SDIO Switching Characteristics - High Rate
      7. 5.21.7 HCI UART Shared-Transport Layers for All Functional Blocks (Except WLAN)
        1. 5.21.7.1 UART 4-Wire Interface - H4
      8. 5.21.8 Bluetooth Codec-PCM (Audio) Timing Specifications
  6. 6Detailed Description
    1. 6.1 WLAN Features
    2. 6.2 Bluetooth Features
    3. 6.3 Bluetooth low energy Features
    4. 6.4 Device Certification
      1. 6.4.1 FCC Certification and Statement
      2. 6.4.2 Innovation, Science, and Economic Development Canada (ISED)
      3. 6.4.3 ETSI/CE
      4. 6.4.4 MIC Certification
    5. 6.5 Module Markings
    6. 6.6 Test Grades
    7. 6.7 End Product Labeling
    8. 6.8 Manual Information to the End User
  7. 7Applications, Implementation, and Layout
    1. 7.1 Application Information
      1. 7.1.1 Typical Application - WL1837MOD Reference Design
      2. 7.1.2 Design Recommendations
      3. 7.1.3 RF Trace and Antenna Layout Recommendations
      4. 7.1.4 Module Layout Recommendations
      5. 7.1.5 Thermal Board Recommendations
      6. 7.1.6 Baking and SMT Recommendations
        1. 7.1.6.1 Baking Recommendations
        2. 7.1.6.2 SMT Recommendations
  8. 8Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
      2. 8.1.2 Development Support
        1. 8.1.2.1 Tools and Software
      3. 8.1.3 Device Support Nomenclature
    2. 8.2 Related Links
    3. 8.3 Community Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  9. 9Mechanical, Packaging, and Orderable Information
    1. 9.1 TI Module Mechanical Outline
    2. 9.2 Tape and Reel Information
      1. 9.2.1 Tape and Reel Specification
      2. 9.2.2 Packing Specification
        1. 9.2.2.1 Reel Box
        2. 9.2.2.2 Shipping Box
    3. 9.3 Packaging Information

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • MOC|100
Thermal pad, mechanical data (Package|Pins)

Specifications

All specifications are measured at the module pins using the TI WL1837MODCOM8I evaluation board. All measurements are performed with VBAT = 3.7 V, VIO = 1.8 V, 25°C for typical values with matched RF antennas, unless otherwise indicated.

NOTE

For level-shifting I/Os with the TI WL18x7MOD, see the Level Shifting WL18xx I/Os Application Report.

Absolute Maximum Ratings(1)

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VBAT 4.8(2) V
VIO –0.5 2.1 V
Input voltage to analog pins –0.5 2.1 V
Input voltage limits (CLK_IN) –0.5 VDD_IO V
Input voltage to all other pins –0.5 (VDD_IO + 0.5 V) V
Operating ambient temperature –40 85(3) °C
Storage temperature, Tstg –40 85 °C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
4.8 V cumulative to 2.33 years, including charging dips and peaks
In the WL18xx system, a control mechanism exists to ensure Tj < 125°C. When Tj approaches this threshold, the control mechanism manages the transmitter patterns.

ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1000 V
Charged device model (CDM), per JEDEC specification JESD22-C101(2) ±250
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN TYP MAX UNIT
VBAT(2) DC supply range for all modes 2.9 3.7 4.8 V
VIO 1.8-V I/O ring power supply voltage 1.62 1.8 1.95 V
VIH I/O high-level input voltage 0.65 × VDD_IO VDD_IO V
VIL I/O low-level input voltage 0 0.35 × VDD_IO V
VIH_EN Enable inputs high-level input voltage 1.365 VDD_IO V
VIL_EN Enable inputs low-level input voltage 0 0.4 V
VOH High-level output voltage @ 4 mA VDD_IO –0.45 VDD_IO V
VOL Low-level output voltage @ 4 mA 0 0.45 V
Tr,Tf Input transitions time Tr,Tf from 10% to 90% (digital I/O)(1) 1 10 ns
Tr Output rise time from 10% to 90% (digital pins)(1) CL < 25 pF 5.3 ns
Tf Output fall time from 10% to 90% (digital pins)(1) CL < 25 pF 4.9 ns
Ambient operating temperature 40 85 ºC
Maximum power dissipation WLAN operation 2.8 W
Bluetooth operation 0.2
Applies to all digital lines except SDIO, UART, I2C, PCM and slow clock lines
4.8 V is applicable only for 2.33 years (30% of the time). Otherwise, maximum VBAT must not exceed 4.3 V.

External Digital Slow Clock Requirements

The supported digital slow clock is 32.768 kHz digital (square wave). All core functions share a single input.
CONDITION MIN TYP MAX UNIT
Input slow clock frequency 32768 Hz
Input slow clock accuracy (Initial + temp + aging) WLAN, Bluetooth ±250 ppm
Tr, Tf Input transition time (10% to 90%) 200 ns
Frequency input duty cycle 15% 50% 85%
VIH, VIL Input voltage limits Square wave, DC-coupled 0.65 x VDD_IO VDD_IO Vpeak
0 0.35 x VDD_IO
Input impedance 1
Input capacitance 5 pF

Thermal Resistance Characteristics for MOC 100-Pin Package

THERMAL METRICS(2) (°C/W)(1)
θJA Junction to free air(3) 16.6
θJB Junction to board 6.06
θJC Junction to case(4) 5.13
These values are based on a JEDEC-defined 2S2P system (with the exception of the Theta JC [RΘJC] value, which is based on a JEDEC-defined 1S0P system) and will change based on environment as well as application. For more information, see these EIA/JEDEC standards:
  • JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions - Natural Convection (Still Air)
  • JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
  • JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
  • JESD51-9, Test Boards for Area Array Surface Mount Package Thermal Measurements
  • Power dissipation of 2 W and an ambient temperature of 70ºC is assumed.

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics Application Report.
According to the JEDEC EIA/JESD 51 document
Modeled using the JEDEC 2s2p thermal test board with 36 thermal vias

WLAN Performance: 2.4-GHz Receiver Characteristics

over operating free-air temperature range (unless otherwise noted). All RF and performance numbers are aligned to the module pin.
PARAMETER CONDITION MIN TYP MAX UNIT
RF_ANT1 pin 2.4-GHz SISO
Operation frequency range 2412 2484 MHz
Sensitivity: 20-MHz bandwidth. At < 10% PER limit 1 Mbps DSSS –95.0 dBm
2 Mbps DSSS –92.0
5.5 Mbps CCK –89.2
11 Mbps CCK –86.3
6 Mbps OFDM –91.0
9 Mbps OFDM –89.0
12 Mbps OFDM –88.0
18 Mbps OFDM –85.5
24 Mbps OFDM –82.5
36 Mbps OFDM –79.0
48 Mbps OFDM –74.0
54 Mbps OFDM –72.5
MCS0 MM 4K –89.3
MCS1 MM 4K –86.5
MCS2 MM 4K –84.5
MCS3 MM 4K –81.5
MCS4 MM 4K –78.0
MCS5 MM 4K –73.5
MCS6 MM 4K –71.5
MCS7 MM 4K –70.0
MCS0 MM 4K 40 MHz –86.0
MCS7 MM 4K 40 MHz –66.3
MCS0 MM 4K MRC –91.0
MCS7 MM 4K MRC –73.0
MCS13 MM 4K –70.0
MCS14 MM 4K –69.0
MCS15 MM 4K –68.3
Maximum input level OFDM –20.0 –10.0 dBm
CCK –10.0 –6.0
DSSS –4.0 –1.0
Adjacent channel rejection: Sensitivity level +3 dB for OFDM; Sensitivity level +6 dB for 11b 2 Mbps DSSS 42.0 dB
11 Mbps CCK 38.0
54 Mbps OFDM 2.0
RX leakage –70 dBm
PER floor 1.0%
RSSI accuracy ±3 dB

WLAN Performance: 2.4-GHz Transmitter Power

over operating free-air temperature range (unless otherwise noted). All RF and performance numbers are aligned to the module pin.
PARAMETER CONDITION(1) MIN TYP MAX UNIT
RF_ANT1 Pin 2.4-GHz SISO
Output Power: Maximum RMS output power measured at 1 dB from IEEE spectral mask or EVM(2) 1 Mbps DSSS 17.3 dBm
2 Mbps DSSS 17.3
5.5 Mbps CCK 17.3
11 Mbps CCK 17.3
6 Mbps OFDM 17.1
9 Mbps OFDM 17.1
12 Mbps OFDM 17.1
18 Mbps OFDM 17.1
24 Mbps OFDM 16.2
36 Mbps OFDM 15.3
48 Mbps OFDM 14.6
54 Mbps OFDM 13.8
MCS0 MM 16.1
MCS1 MM 16.1
MCS2 MM 16.1
MCS3 MM 16.1
MCS4 MM 15.3
MCS5 MM 14.6
MCS6 MM 13.8
MCS7 MM(3) 12.6
MCS0 MM 40 MHz 14.8
MCS7 MM 40 MHz 11.3
RF_ANT1 + RF_ANT2 MIMO
MCS12 (WL18x5) 18.5 dBm
MCS13 (WL18x5) 17.4
MCS14 (WL18x5) 14.5
MCS15 (WL18x5) 13.4
RF_ANT1 + RF_ANT2
Operation frequency range 2412 2484 MHz
Return loss –10.0 dB
Reference input impedance 50.0 Ω
Maximum transmitter power (TP) degradation of up to 30% is expected, starting from 80°C ambient temperature on MIMO operation
Regulatory constraints limit TI module output power to the following:
  • Channel 14 is used only in Japan; to keep the channel spectral shaping requirement, the power is limited: 14.5 dBm.
  • Channels 1, 11 @ OFDM legacy and HT 20-MHz rates: 12 dBm
  • Channels 1, 11 @ HT 40-MHz rates: 10 dBm
  • Channel 7 @ HT 40-MHz lower rates: 10 dBm
  • Channel 5 @ HT 40-MHz upper rates: 10 dBm
  • All 11B rates are limited to 16 dBm to comply with the ETSI PSD 10 dBm/MHz limit.
  • All OFDM rates are limited to 16.5 dBm to comply with the ETSI EIRP 20 dBm limit.
  • For clarification regarding power limitation, see the WL18xx .INI File Application Report.
To ensure compliance with the EVM conditions specified in the PHY chapter of IEEE Std 802.11™ – 2012:
  • MCS7 20 MHz channel 12 output power is 2 dB lower than the typical value.
  • MCS7 20 MHz channel 8 output power is 1 dB lower than the typical value.

WLAN Performance: 5-GHz Receiver Characteristics

over operating free-air temperature range (unless otherwise noted). All RF and performance numbers are aligned to the module pin.
PARAMETER CONDITION MIN TYP MAX UNIT
RF_ANT1 or RF_ANT2
Operation frequency range 4910.0 5825.0 MHz
Sensitivity: 20-MHz bandwidth. At < 10% PER limit 6 Mbps OFDM 1K –92.5 dBm
9 Mbps OFDM 1K –90.5
12 Mbps OFDM 1K –90.0
18 Mbps OFDM 1K –87.5
24 Mbps OFDM 1K –84.5
36 Mbps OFDM 1K –81.0
48 Mbps OFDM 1K –76.5
54 Mbps OFDM 1K –74.6
MCS0 MM 4K –91.4
MCS1 MM 4K –88.0
MCS2 MM 4K –86.0
MCS3 MM 4K –83.0
MCS4 MM 4K –79.8
MCS5 MM 4K –75.5
MCS6 MM 4K –74.0
MCS7 MM 4K –72.4
MCS0 MM 4K 40 MHz –88.5
MCS7 MM 4K 40 MHz –69.3
Maximum input level OFDM –30.0 –15.0 dBm
Adjacent channel rejection sensitivity +3 dB OFDM54 2.0 dBm
RX LO leakage –52.0 dBm
PER floor 1.0% 2.0%
RSSI accuracy ±3 dB

WLAN Performance: 5-GHz Transmitter Power(3)

over operating free-air temperature range (unless otherwise noted)
PARAMETER CONDITION(1) MIN TYP MAX UNIT
RF_ANT1 or RF_ANT2
Operation frequency range 4920 5825 MHz
RMS output power complies with IEEE mask and EVM requirements(2) 6 Mbps OFDM 18.0
9 Mbps OFDM 18.0
12 Mbps OFDM 18.0
18 Mbps OFDM 18.0
24 Mbps OFDM 17.4
36 Mbps OFDM 16.5
48 Mbps OFDM 15.8
54 Mbps OFDM 14.5
MCS0 MM 18.0
MCS1 MM 4K 18.0
MCS2 MM 4K 18.0
MCS3 MM 4K 18.0
MCS4 MM 4K 16.5
MCS5 MM 4K 15.8
MCS6 MM 4K 14.5
MCS7 MM 4K 13.0
MCS0 MM 40 MHz 16.5
MCS7 MM 40 MHz 12.0
Output power resolution 0.125 dB
Return loss –10.0 dB
Reference input impedance 50.0 Ω
Maximum TP degradation of up to 30% is expected, starting from 80°C ambient temperature on 5-GHz TX operation.
For further clarification regarding power limitation, see the WL18xx INI File Guide.
All RF and performance numbers are aligned to the module pin.

WLAN Performance: Currents(2)

over operating free-air temperature range (unless otherwise noted)
PARAMETER SPECIFICATION TYP (AVG) –25°C UNIT
Receiver Low-power mode (LPM) 2.4-GHz RX SISO20 single chain 49 mA
2.4 GHz RX search SISO20 58
2.4-GHz RX search MIMO20 74
2.4-GHz RX search SISO40 63
2.4-GHz RX 20 M SISO 11 CCK 60
2.4-GHz RX 20 M SISO 6 OFDM 61
2.4-GHz RX 20 M SISO MCS7 69
2.4-GHz RX 20 M MRC 1 DSSS 74
2.4-GHz RX 20 M MRC 6 OFDM 81
2.4-GHz RX 20 M MRC 54 OFDM 85
2.4-GHz RX 40-MHz MCS7 81
5-GHz RX 20-MHz OFDM6 68
5-GHz RX 20-MHz MCS7 77
5-GHz RX 40-MHz MCS7 85
Transmitter(1) 2.4-GHz TX 20 M SISO 6 OFDM 285 mA
2.4-GHz TX 20 M SISO 11 CCK 283
2.4-GHz TX 20 M SISO 54 OFDM 247
2.4-GHz TX 20 M SISO MCS7 238
2.4-GHz TX 20 M MIMO MCS15 510
2.4-GHz TX 40 M SISO MCS7 243
5-GHz TX 20 M SISO 6 OFDM 366
5-GHz TX 20 M SISO 54 OFDM 329
5-GHz TX 20 M SISO MCS7 324
5-GHz TX 40 M SISO MCS7 332
Numbers reflect the typical current consumption at maximum output power per rate.
All RF and performance numbers are aligned to the module pin.

Bluetooth Performance: BR, EDR Receiver Characteristics—In-Band Signals(2)

over operating free-air temperature range (unless otherwise noted)
PARAMETER CONDITION MIN TYP MAX UNIT
Bluetooth BR, EDR operation frequency range 2402 2480 MHz
Bluetooth BR, EDR channel spacing 1 MHz
Bluetooth BR, EDR input impedance 50 Ω
Bluetooth BR, EDR sensitivity(1)
dirty TX on
BR, BER = 0.1% –92.2 dBm
EDR2, BER = 0.01% –91.7
EDR3, BER = 0.01% –84.7
Bluetooth EDR BER floor at sensitivity + 10 dB
Dirty TX off (for 1,600,000 bits)
EDR2 1e-6
EDR3 1e-6
Bluetooth BR, EDR maximum usable input power BR, BER = 0.1% –5.0 dBm
EDR2, BER = 0.1% –15.0
EDR3, BER = 0.1% –15.0
Bluetooth BR intermodulation Level of interferers for n = 3, 4, and 5 –36.0 –30.0 dBm
Bluetooth BR, EDR C/I performance
Numbers show wanted signal-to-interfering-signal ratio. Smaller numbers indicate better C/I performances (Image frequency = –1 MHz)
BR, co-channel 10 dB
EDR, co-channel EDR2 12
EDR3 20
BR, adjacent ±1 MHz –3.0
EDR, adjacent ±1 MHz, (image) EDR2 –3.0
EDR3 2.0
BR, adjacent +2 MHz –33.0
EDR, adjacent +2 MHz EDR2 –33.0
EDR3 –28.0
BR, adjacent –2 MHz –20.0
EDR, adjacent –2 MHz EDR2 –20.0
EDR3 –13.0
BR, adjacent ≥Ι±3Ι MHz –42.0
EDR, adjacent ≥Ι±3Ι MHz EDR2 –42.0
EDR3 –36.0
Bluetooth BR, EDR RF return loss –10.0 dB
Sensitivity degradation up to –3 dB may occur due to fast clock harmonics with dirty TX on.
All RF and performance numbers are aligned to the module pin.

Bluetooth Performance: Transmitter, BR(3)

over operating free-air temperature range (unless otherwise noted)
PARAMETER MIN TYP MAX UNIT
BR RF output power(1) VBAT ≥ 3 V(2) 11.7 dBm
VBAT < 3 V(2) 7.2
BR gain control range 30.0 dB
BR power control step 5.0 dB
BR adjacent channel power |M-N| = 2 –43.0 dBm
BR adjacent channel power |M-N| > 2 –48.0 dBm
Values reflect maximum power. Reduced power is available using a vendor-specific (VS) command.
VBAT is measured with an on-chip ADC that has an accuracy error of up to 5%.
All RF and performance numbers are aligned to the module pin.

Bluetooth Performance: Transmitter, EDR(3)

over operating free-air temperature range (unless otherwise noted)
PARAMETER MIN TYP MAX UNIT
EDR output power(1) VBAT ≥ 3 V(2) 7.2 dBm
VBAT < 3 V(2) 5.2
EDR gain control range 30 dB
EDR power control step 5 dB
EDR adjacent channel power |M-N| = 1 –36 dBc
EDR adjacent channel power |M-N| = 2 –30 dBm
EDR adjacent channel power |M-N| > 2 –42 dBm
Values reflect default maximum power. Maximum power can be changed using a VS command.
VBAT is measured with an on-chip ADC that has an accuracy error of up to 5%.
All RF and performance numbers are aligned to the module pin.

Bluetooth Performance: Modulation, BR(3)

over operating free-air temperature range (unless otherwise noted)
CHARACTERISTICS CONDITION(1) MIN TYP MAX UNIT
BR –20-dB bandwidth 925 995 kHz
BR modulation characteristics ∆f1avg Mod data = 4 1s, 4 0s: 111100001111... 145 160 170 kHz
∆f2max ≥ limit for at least 99.9% of all Δf2max Mod data = 1010101... 120 130 kHz
∆f2avg, ∆f1avg 85% 88%
BR carrier frequency drift One-slot packet –25 25 kHz
Three- and five-slot packet –35 35 kHz
BR drift rate lfk+5 – fkl , k = 0 …. max 15 kHz/50 µs
BR initial carrier frequency tolerance(2) f0–fTX ±75 ±75 kHz
Performance values reflect maximum power.
Numbers include XTAL frequency drift over temperature and aging.
All RF and performance numbers are aligned to the module pin.

Bluetooth Performance: Modulation, EDR(3)

over operating free-air temperature range (unless otherwise noted)
PARAMETER(1) CONDITION MIN TYP MAX UNIT
EDR carrier frequency stability –5 5 kHz
EDR initial carrier frequency tolerance(2) ±75 ±75 kHz
EDR RMS DEVM EDR2 4% 15%
EDR3 4% 10%
EDR 99% DEVM EDR2 30%
EDR3 20%
EDR peak DEVM EDR2 9% 25%
EDR3 9% 18%
Performance values reflect maximum power.
Numbers include XTAL frequency drift over temperature and aging.
All RF and performance numbers are aligned to the module pin.

Bluetooth low energy Performance: Receiver Characteristics – In-Band Signals(3)

over operating free-air temperature range (unless otherwise noted)
PARAMETER CONDITION(2) MIN TYP MAX UNIT
Bluetooth low energy operation frequency range 2402 2480 MHz
Bluetooth low energy channel spacing 2 MHz
Bluetooth low energy input impedance 50 Ω
Bluetooth low energy sensitivity(1)
Dirty TX on
–92.2 dBm
Bluetooth low energy maximum usable input power –5 dBm
Bluetooth low energy intermodulation characteristics Level of interferers.
For n = 3, 4, 5
–36 –30 dBm
Bluetooth low energy C/I performance.
Note: Numbers show wanted signal-to-interfering-signal ratio. Smaller numbers indicate better C/I performance.
Image = –1 MHz
low energy, co-channel 12 dB
low energy, adjacent ±1 MHz 0
low energy, adjacent +2 MHz –38
low energy, adjacent –2 MHz –15
low energy, adjacent ≥ |±3|MHz –40
Sensitivity degradation of up to –3 dB can occur due to fast clock harmonics.
BER of 0.1% corresponds to PER of 30.8% for a minimum of 1500 transmitted packets, according to the Bluetooth low energy test specification.
All RF and performance numbers are aligned to the module pin.

Bluetooth low energy Performance: Transmitter Characteristics(3)

over operating free-air temperature range (unless otherwise noted)
PARAMETER MIN TYP MAX UNIT
Bluetooth low energy RF output power(1) VBAT ≥ 3 V(2) 7.0 dBm
VBAT < 3 V(2) 7.0
Bluetooth low energy adjacent channel power |M-N| = 2 –51.0 dBm
Bluetooth low energy adjacent channel power |M-N| > 2 –54.0 dBm
Bluetooth low energy power is restricted to comply with the ETSI 10-dBm EIRP limit requirement.
VBAT is measured with an on-chip ADC that has an accuracy error of up to 5%.
All RF and performance numbers are aligned to the module pin.

Bluetooth low energy Performance: Modulation Characteristics(3)

over operating free-air temperature range (unless otherwise noted)
CHARACTERISTICS CONDITION(1) MIN TYP MAX UNIT
Bluetooth low energy modulation characteristics ∆f1avg Mod data = four 1s and four 0s: 111100001111... 240 250 260 kHz
∆f2max ≥ limit for at least 99.9% of all Δf2max Mod data = 1010101... 195 215
∆f2avg, ∆f1avg 85% 90%
Bluetooth low energy carrier frequency drift lf0 – fnl , n = 2,3 …. K –25 25 kHz
Bluetooth low energy drift rate lf1 – f0l and lfn – fn-5l , n = 6,7…. K 15 kHz/50 µs
Bluetooth low energy initial carrier frequency tolerance(2) fn – fTX ±75 ±75 kHz
Performance values reflect maximum power.
Numbers include XTAL frequency drift over temperature and aging.
All RF and performance numbers are aligned to the module pin.

Bluetooth BR and EDR Dynamic Currents

Current is measured at output power as follows: BR at 11.7 dBm; EDR at 7.2 dBm.
USE CASE(1)(2) TYP UNIT
BR voice HV3 + sniff 11.6 mA
EDR voice 2-EV3 no retransmission + sniff 5.9 mA
Sniff 1 attempt 1.28 s 178.0 µA
EDR A2DP EDR2 (master). SBC high quality – 345 kbps 10.4 mA
EDR A2DP EDR2 (master). MP3 high quality – 192 kbps 7.5 mA
Full throughput ACL RX: RX-2DH5(3)(4) 18.0 mA
Full throughput BR ACL TX: TX-DH5(4) 50.0 mA
Full throughput EDR ACL TX: TX-2DH5(4) 33.0 mA
Page scan or inquiry scan (scan interval is 1.28 s or 11.25 ms, respectively) 253.0 µA
Page scan and inquiry scan (scan interval is 1.28 s and 2.56 s, respectively) 332.0 µA
The role of Bluetooth in all scenarios except A2DP is slave.
CL1P5 PA is connected to VBAT, 3.7 V.
ACL RX has the same current in all modulations.
Full throughput assumes data transfer in one direction.

Bluetooth low energy Currents

All current measured at output power of 6.5 dBm
USE CASE(1) TYP UNIT
Advertising, not connectable(2) 131 µA
Advertising, discoverable(2) 143 µA
Scanning(3) 266 µA
Connected, master role, 1.28-s connect interval(4) 124 µA
Connected, slave role, 1.28-s connect interval (4) 132 µA
CL1p% PA is connected to VBAT, 3.7 V.
Advertising in all three channels, 1.28-s advertising interval, 15 bytes advertise data
Listening to a single frequency per window, 1.28-s scan interval, 11.25-ms scan window
Zero slave connection latency, empty TX and RX LL packets

Timing and Switching Characteristics

Power Management

Block Diagram – Internal DC-DCs

The device incorporates three internal DC-DCs (switched-mode power supplies) to provide efficient internal supplies, derived from VBAT.

WL1807MOD WL1837MOD bd_fig7_swrs152.gif Figure 5-1 Internal DC-DCs

Power-Up and Shut-Down States

The correct power-up and shut-down sequences must be followed to avoid damage to the device.

While VBAT or VIO or both are deasserted, no signals should be driven to the device. The only exception is the slow clock that is a fail-safe I/O.

While VBAT, VIO, and slow clock are fed to the device, but WL_EN is deasserted (low), the device is in SHUTDOWN state. In SHUTDOWN state all functional blocks, internal DC-DCs, clocks, and LDOs are disabled.

To perform the correct power-up sequence, assert (high) WL_EN. The internal DC-DCs, LDOs, and clock start to ramp and stabilize. Stable slow clock, VIO, and VBAT are prerequisites to the assertion of one of the enable signals.

To perform the correct shut-down sequence, deassert (low) WL_EN while all the supplies to the device (VBAT, VIO, and slow clock) are still stable and available. The supplies to the chip (VBAT and VIO) can be deasserted only after both enable signals are deasserted (low).

Figure 5-2 shows the general power scheme for the module, including the power-down sequence.

WL1807MOD WL1837MOD td_fig7_3_b_swrs152.gif
NOTE: 1. Either VBAT or VIO can come up first.
NOTE: 2. VBAT and VIO supplies and slow clock (SCLK), must be stable prior to EN being asserted and at all times
NOTE: when the EN is active.
NOTE: 3. At least 60 µs is required between two successive device enables. The device is assumed to be in
NOTE: shutdown state during that period, meaning all enables to the device are LOW for that minimum duration.
NOTE: 4. EN must be deasserted at least 10 µs before VBAT or VIO supply can be lowered (order of supply turn off
NOTE: after EN shutdown is immaterial).
NOTE: 5. EXT_32K - Fail safe I/O
Figure 5-2 Power-Up System

Chip Top-level Power-Up Sequence

Figure 5-3 shows the top-level power-up sequence for the chip.

WL1807MOD WL1837MOD td_fig8_4_swrs152.gif Figure 5-3 Chip Top-Level Power-Up Sequence

WLAN Power-Up Sequence

Figure 5-4 shows the WLAN power-up sequence.

WL1807MOD WL1837MOD td_fig8_swrs152.gif Figure 5-4 WLAN Power-Up Sequence

Bluetooth-Bluetooth low energy Power-Up Sequence

Figure 5-5 shows the Bluetooth-Bluetooth low energy power-up sequence.

WL1807MOD WL1837MOD Figure_8-6_swrs152.gif Figure 5-5 Bluetooth-Bluetooth low energy Power-Up Sequence

WLAN SDIO Transport Layer

The SDIO is the host interface for WLAN. The interface between the host and the WL18xx module uses an SDIO interface and supports a maximum clock rate of 50 MHz.

The device SDIO also supports the following features of the SDIO V3 specification:

  • 4-bit data bus
  • Synchronous and asynchronous in-band interrupt
  • Default and high-speed (HS, 50 MHz) timing
  • Sleep and wake commands

SDIO Timing Specifications

Figure 5-6 and Figure 5-7 show the SDIO switching characteristics over recommended operating conditions and with the default rate for input and output.

WL1807MOD WL1837MOD SWRS152-04.gif Figure 5-6 SDIO Default Input Timing
WL1807MOD WL1837MOD SWRS152-05.gif Figure 5-7 SDIO Default Output Timing

Table 5-1 lists the SDIO default timing characteristics.

Table 5-1 SDIO Default Timing Characteristics(1)

MIN MAX UNIT
fclock Clock frequency, CLK(2) 0.0 26.0 MHz
DC Low, high duty cycle(2) 40.0% 60.0%
tTLH Rise time, CLK(2) 10.0 ns
tTHL Fall time, CLK(2) 10.0 ns
tISU Setup time, input valid before CLK ↑(2) 3.0 ns
tIH Hold time, input valid after CLK ↑(2) 2.0 ns
tODLY Delay time, CLK ↓ to output valid(2) 7.0 10.0 ns
Cl Capacitive load on outputs(2) 15.0 pF
To change the data out clock edge from the falling edge (default) to the rising edge, set the configuration bit.
Parameter values reflect maximum clock frequency.

SDIO Switching Characteristics – High Rate

Figure 5-8 and Figure 5-9 show the parameters for maximum clock frequency.

WL1807MOD WL1837MOD SWRS152-06.gif Figure 5-8 SDIO HS Input Timing
WL1807MOD WL1837MOD SWRS152-07.gif Figure 5-9 SDIO HS Output Timing

Table 5-2 lists the SDIO high-rate timing characteristics.

Table 5-2 SDIO HS Timing Characteristics

MIN MAX UNIT
fclock Clock frequency, CLK 0.0 52.0 MHz
DC Low, high duty cycle 40.0% 60.0%
tTLH Rise time, CLK 3.0 ns
tTHL Fall time, CLK 3.0 ns
tISU Setup time, input valid before CLK ↑ 3.0 ns
tIH Hold time, input valid after CLK ↑ 2.0 ns
tODLY Delay time, CLK ↑ to output valid 7.0 10.0 ns
Cl Capacitive load on outputs 10.0 pF

HCI UART Shared-Transport Layers for All Functional Blocks (Except WLAN)

The device includes a UART module dedicated to the Bluetooth shared-transport, host controller interface (HCI) transport layer. The HCI transports commands, events, and ACL between the Bluetooth device and its host using HCI data packets ack as a shared transport for all functional blocks except WLAN. Table 5-3 lists the transport mechanism for WLAN and bluetooth audio.

_

Table 5-3 Transport Mechanism

WLAN SHARED HCI FOR ALL FUNCTIONAL BLOCKS EXCEPT WLAN BLUETOOTH VOICE-AUDIO
WLAN HS SDIO Over UART Bluetooth PCM

The HCI UART supports most baud rates (including all PC rates) for all fast-clock frequencies up to a maximum of 4 Mbps. After power up, the baud rate is set for 115.2 Kbps, regardless of the fast-clock frequency. The baud rate can then be changed using a VS command. The device responds with a Command Complete Event (still at 115.2 Kbps), after which the baud rate change occurs.

HCI hardware includes the following features:

  • Receiver detection of break, idle, framing, FIFO overflow, and parity error conditions
  • Receiver-transmitter underflow detection
  • CTS, RTS hardware flow control
  • 4 wire (H4)

Table 5-4 lists the UART default settings.

Table 5-4 UART Default Setting

PARAMETER VALUE
Bit rate 115.2 Kbps
Data length 8 bits
Stop-bit 1
Parity None

UART 4-Wire Interface – H4

The interface includes four signals:

  • TXD
  • RXD
  • CTS
  • RTS

Flow control between the host and the device is byte-wise by hardware.

When the UART RX buffer of the device passes the flow-control threshold, the buffer sets the UART_RTS signal high to stop transmission from the host. When the UART_CTS signal is set high, the device stops transmitting on the interface. If HCI_CTS is set high in the middle of transmitting a byte, the device finishes transmitting the byte and stops the transmission.

Figure 5-10 shows the UART timing.

WL1807MOD WL1837MOD SWRS152-09.gif Figure 5-10 UART Timing Diagram

Table 5-5 lists the UART timing characteristics.

Table 5-5 UART Timing Characteristics

PARAMETER CONDITION MIN TYP MAX UNIT
Baud rate 37.5 4364 Kbps
Baud rate accuracy per byte Receive-transmit –2.5% 1.5%
Baud rate accuracy per bit Receive-transmit –12.5% 12.5%
t3 CTS low to TX_DATA on 0.0 2.0 µs
t4 CTS high to TX_DATA off Hardware flow control 1.0 Byte
t6 CTS high pulse width 1.0 Bit
t1 RTS low to RX_DATA on 0.0 2.0 µs
t2 RTS high to RX_DATA off Interrupt set to 1/4 FIFO 16.0 Bytes

Figure 5-11 shows the UART data frame.

WL1807MOD WL1837MOD SWRS152-015.gif Figure 5-11 UART Data Frame

Bluetooth Codec-PCM (Audio) Timing Specifications

Figure 5-12 shows the Bluetooth codec-PCM (audio) timing diagram.

WL1807MOD WL1837MOD SWRS152-10.gif Figure 5-12 Bluetooth Codec-PCM (Audio) Master Timing Diagram

Table 5-6 lists the Bluetooth codec-PCM master timing characteristics.

Table 5-6 Bluetooth Codec-PCM Master Timing Characteristics

PARAMETER MIN MAX UNIT
Tclk Cycle time 162.76 (6.144 MHz) 15625 (64 kHz) ns
Tw High or low pulse width 35% of Tclk min
tis AUD_IN setup time 10.6
tih AUD_IN hold time 0
top AUD_OUT propagation time 0 15
top FSYNC_OUT propagation time 0 15
Cl Capacitive loading on outputs 40 pF

Table 5-7 lists the Bluetooth codec-PCM slave timing characteristics.

Table 5-7 Bluetooth Codec-PCM Slave Timing Characteristics

PARAMETER MIN MAX UNIT
Tclk Cycle time 81.38 (12.288 MHz) ns
Tw High or low pulse width 35% of Tclk min
tis AUD_IN setup time 5
tih AUD_IN hold time 0
tis AUD_FSYNC setup time 5
tih AUD_FSYNC hold time 0
top AUD_OUT propagation time 0 19
Cl Capacitive loading on outputs 40 pF