SBOS913 February   2018 XTR305

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Typical Application
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: Voltage Output Mode
    6. 6.6  Electrical Characteristics: Current Output Mode
    7. 6.7  Electrical Characteristics: Operational Amplifier (OPA)
    8. 6.8  Electrical Characteristics: Instrumentation Amplifier (IA)
    9. 6.9  Electrical Characteristics: Current Monitor
    10. 6.10 Electrical Characteristics: Power and Digital
    11. 6.11 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Functional Features
      2. 7.3.2 Current Monitor
      3. 7.3.3 Error Flags
      4. 7.3.4 Power On/Off Glitch
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Voltage Output Mode
        2. 8.2.2.2  Current Output Mode
        3. 8.2.2.3  Input Signal Connection
        4. 8.2.2.4  Externally-Configured Mode: OPA and IA
        5. 8.2.2.5  Driver Output Disable
        6. 8.2.2.6  Driving Capacitive Loads and Loop Compensation
        7. 8.2.2.7  Internal Current Sources, Switching Noise, and Settling Time
        8. 8.2.2.8  IA Structure, Voltage Monitor
        9. 8.2.2.9  Digital I/O and Ground Considerations
        10. 8.2.2.10 Output Protection
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 VQFN Package and Heat Sinking
    4. 10.4 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Driving Capacitive Loads and Loop Compensation

For normal operation, the driver OPA and the IA are connected in a closed loop for voltage output. In current output mode, the current copy closes the loop directly.

In current output mode, loop compensation is not critical, even for large capacitive loads. However, in voltage output mode, the capacitive load, together with the source impedance and the impedance of the protection circuit, generates additional phase lag. The IA input might also be protected by a low-pass filter that influences phase in the closed loop.

The loop compensation low-pass filter consists of CC and the parallel resistance of ROS and RSET. For loop stability with large capacitive load, the external phase shift has to be added to the OPA phase. With CC, the voltage gain of the OPA has to approach zero at the frequency where the total phase approaches 180° + 135°.

The best stability for large capacitive loads is provided by adding a small resistor, RC (15 Ω). See the Output Protection section.

An empirical method of evaluation is using a square wave input signal and observing the settling after transients. Use small signal amplitudes only—steep signal edges cause excessive current to flow into the capacitive load and may activate the current limit, which hides or prevents oscillation. A small-signal oscillation can be hidden from large capacitive loads, but observing the IMON output on an appropriate resistor (use a similar value like RSET||ROS) would indicate stability issues. Note that noise pulses at IMON during overload (EFLD active) are normal and are caused by cycling of the current mirror.

The voltage output mode includes the IA in the loop. An additional low-pass filter in the input reverses the phase and therefore increases the signal bandwidth of the loop, but also increases the delay. Again, loop stability has to be observed. Overloading the IA disconnects the closed loop and the output voltage rails.