SBAS601H December   2012  – July 2014 AFE4400

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Family Options
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Timing Requirements: Supply Ramp and Power-Down
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Receiver Channel
        1. 8.3.1.1 Receiver Front-End
        2. 8.3.1.2 Ambient Cancellation Scheme and Second Stage Gain Block
        3. 8.3.1.3 Receiver Control Signals
        4. 8.3.1.4 Receiver Timing
      2. 8.3.2 Clocking and Timing Signal Generation
      3. 8.3.3 Timer Module
        1. 8.3.3.1 Using the Timer Module
      4. 8.3.4 Receiver Subsystem Power Path
      5. 8.3.5 Transmit Section
        1. 8.3.5.1 Transmitter Power Path
        2. 8.3.5.2 LED Power Reduction During Periods of Inactivity
    4. 8.4 Device Functional Modes
      1. 8.4.1 ADC Operation and Averaging Module
        1. 8.4.1.1 Operation
      2. 8.4.2 Diagnostics
        1. 8.4.2.1 Photodiode-Side Fault Detection
        2. 8.4.2.2 Transmitter-Side Fault Detection
        3. 8.4.2.3 Diagnostics Module
    5. 8.5 Programming
      1. 8.5.1 Serial Programming Interface
      2. 8.5.2 Reading and Writing Data
        1. 8.5.2.1 Writing Data
        2. 8.5.2.2 Reading Data
        3. 8.5.2.3 Multiple Data Reads and Writes
        4. 8.5.2.4 Register Initialization
        5. 8.5.2.5 AFE SPI Interface Design Considerations
    6. 8.6 Register Maps
      1. 8.6.1 AFE Register Map
      2. 8.6.2 AFE Register Description
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Fully-Integrated Analog Front-End for Pulse Oximeter Applications:
    • Flexible Pulse Sequencing and
      Timing Control
  • Transmit:
    • Integrated LED Driver
      (H-Bridge, Push, or Pull)
    • Dynamic Range: 95 dB
    • LED Current:
      • Programmable to 50 mA with 8-Bit Current Resolution
    • Low Power:
      • 100 µA + Average LED Current
    • Programmable LED On-Time
    • Independent LED2 and LED1 Current Reference
  • Receive Channel with High Dynamic Range:
    • 13 Noise-Free Bits
    • Low Power: < 670 µA at 3.3-V Supply
    • Integrated Digital Ambient Estimation and Subtraction
    • Flexible Receive Sample Time
    • Flexible Transimpedance Amplifier with Programmable LED Settings
  • Integrated Fault Diagnostics:
    • Photodiode and LED Open and
      Short Detection
    • Cable On and Off Detection
  • Supplies:
    • Rx = 2.0 V to 3.6 V
    • Tx = 3.0 V to 5.25 V
  • Package: Compact VQFN-40 (6 mm × 6 mm)
  • Specified Temperature Range: 0°C to 70°C

2 Applications

  • Low-Cost Medical Pulse Oximeter Applications
  • Optical HRM
  • Industrial Photometry Applications

3 Description

The AFE4400 is a fully-integrated analog front-end (AFE) ideally suited for pulse oximeter applications. The device consists of a low-noise receiver channel with an integrated analog-to-digital converter (ADC), an LED transmit section, and diagnostics for sensor and LED fault detection. The device is a very configurable timing controller. This flexibility enables the user to have complete control of the device timing characteristics. To ease clocking requirements and provide a low-jitter clock to the AFE4400, an oscillator is also integrated that functions from an external crystal. The device communicates to an external microcontroller or host processor using an SPI™ interface.

The device is a complete AFE solution packaged in a single, compact VQFN-40 package (6 mm × 6 mm) and is specified over the operating temperature range of 0°C to 70°C.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
AFE4400 VQFN (40) 6.00 mm × 6.00 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.
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4 Revision History

Changes from G Revision (July 2014) to H Revision

  • Changed HBM value from ±4000 to ±1000 in Handling Ratings table Go
  • Changed CDM value from ±1500 to ±250 in Handling Ratings table Go

Changes from F Revision (October 2013) to G Revision

  • Changed format to meet latest data sheet standards; added new sections, and moved existing sectionsGo
  • Changed sub-bullet of Transmit Features bulletGo
  • Changed second sub-bullet of Integrated Fault Diagnostics Features bulletGo
  • Added AFE4403 row to Family and Ordering Information tableGo
  • Changed title of Device Family Options tableGo
  • Changed INM to INN in VCM description of Pin Descriptions tableGo
  • Changed Absolute Maximum Ratings table: changed first five rows and added TXP, TXN pins rowGo
  • Deleted Typical value (> 1.3) for Logic high input voltage Go
  • Deleted Typical value (> -0.4) for Logic low input voltage Go
  • Changed SPISTE, SPISIMO, and SPISOMI pin names in Figure 1Go
  • Changed SPISTE and SPISIMO pin names in Figure 2Go
  • Added second and third paragraphs to the Receiver Front-End section Go
  • Changed seventh paragraph in Receiver Front-End sectionGo
  • Changed title of Ambient Cancellation Scheme and Second Stage Gain Block sectionGo
  • Changed descriptions of LED2, ambient, and LED1 convert phases in Receiver Control Signals sectionGo
  • Changed description of Receiver Timing section Go
  • Changed Example column values for rows t2, t4, t5, t11, t13, t15, t17, t19, t22, t24, t26, and t28 in Table 2Go
  • Added footnote 2 to Table 2Go
  • Added footnote 2 to Figure 42Go
  • Added footnote 2 to Figure 43Go
  • Changed the ADC Operation and Averaging Module section: grammatical edits and changed the second sentence of the second paragraphGo
  • Changed INN pin name in Figure 53Go
  • Changed INM to INN in Table 5Go
  • Changed SPISTE, SPISIMO, SPISOMI, and SCLK pin names in Figure 58Go
  • Added Application and Implementation sectionGo

Changes from E Revision (October 2013) to F Revision

  • Changed footnote 1 in Recommended Operating Conditions tableGo
  • Changed LED_DRV_SUP parameter in Recommended Operating Conditions tableGo
  • Changed TXM to TXN in VLED footnote of Recommended Operating Conditions tableGo
  • Changed Transmitter, Voltage on TXP (or TXN) pin parameter in Electrical Characteristics tableGo
  • Changed Figure 54 (changed TXP and TXN pin names, deleted LED 1 and LED 2 pin names)Go

Changes from D Revision (May 2013) to E Revision

  • Deleted chip graphicGo
  • Changed 1st sub-bullet of 3rd Features bulletGo
  • Changed last sub-bullet of Supplies Features bulletGo
  • Updated front page graphicGo
  • Changed Tx Power Supply column in Family and Ordering Information tableGo
  • Changed TX_REF description in Pin Descriptions tableGo
  • Changed TX_CTRL_SUP value in Recommended Operating Conditions tableGo
  • Changed conditions for Electrical Characteristics tableGo
  • Changed Performance, PRF parameter minimum specification in Electrical Characteristics tableGo
  • Deleted Performance, IIN_FS parameter from Electrical Characteristics tableGo
  • Changed Performance, CMRR parameter in Electrical Characteristics tableGo
  • Changed Performance (Full-Signal Chain), Total integrated noise current and NFB parameter test conditions in Electrical Characteristics tableGo
  • Changed Receiver Functional Block Level Specification, Total integrated noise current parameter test conditions in Electrical Characteristics tableGo
  • Changed Ambient Cancellation Stage, Gain parameter in Electrical Characteristics tableGo
  • Added Low-Pass Filter, Filter settling time parameter to Electrical Characteristics tableGo
  • Changed Diagnostics, Duration of diagnostics state machine parameter unit value in Electrical Characteristics tableGo
  • Changed External Clock, Maximum allowable external clock jitter parameter in Electrical Characteristics tableGo
  • Updated Figure 8 to Figure 10Go
  • Updated Figure 11 to Figure 16Go
  • Updated Figure 17 to Figure 19Go
  • Updated Figure 31 and Figure 32Go
  • Updated functional block diagramGo
  • Updated Figure 34Go
  • Changed second sentence in second paragraph of Receiver Front-End sectionGo
  • Changed third paragraph of Receiver Front-End sectionGo
  • Changed second paragraph of Ambient Cancellation Scheme sectionGo
  • Added last paragraph and Table 1 to Ambient Cancellation Scheme sectionGo
  • Updated Figure 37Go
  • Updated Figure 39Go
  • Added footnote 1 to Table 2Go
  • Changed example column in Table 2Go
  • Added last sentence to third column of row t13 in Table 2Go
  • Deleted last sentence from third column of row t14 in Table 2Go
  • Changed corresponding register address name in row t21 of Table 2Go
  • Updated Figure 42Go
  • Updated Figure 43Go
  • Updated Figure 44Go
  • Changed entire Transmit SectionGo
  • Changed second paragraph of the ADC Operation and Averaging Module sectionGo
  • Updated Figure 49Go
  • Changed Operation section title and first sentenceGo
  • Changed last sentence of the Operation With Averaging section Go
  • Updated Figure 52Go
  • Changed last paragraph of Diagnostics Module sectionGo
  • Added first and last sentence to Writing Data sectionGo
  • Changed second to last sentence in Writing Data sectionGo
  • Added first and last sentence to Reading Data sectionGo
  • Changed second to last sentence in Reading Data sectionGo
  • Added Multiple Data Reads and Writes sectionGo
  • Added last sentence to the AFE SPI Interface Design Considerations sectionGo
  • Added Register Control column to Table 6Go
  • Changed name of ADCRSTSTCT0 register (address 15h) in Table 6Go
  • Changed bit D10 in CONTROL2 row of Table 6Go
  • Changed CONTROL0 paragraph descriptionGo
  • Added note to bit D2 description of CONTROL0 registerGo
  • Corrected bit names in ADCRSTSTCT0 registerGo
  • Changed PRPCOUNT[15:0] (bits D[15:0]) description of PRPCOUNT registerGo
  • Changed note within CLKALMPIN[2:0] (bits D[11:9]) description of CONTROL1 registerGo
  • Changed second and third columns of Table 7Go
  • Changed 001 and 011 bit settings for the STG2GAIN[2:0] bits (bits D[10:8]) in the TIA_AMB_GAIN registerGo
  • Changed bit D10 of the CONTROL2 registerGo