0 |
TIME_STAMP_EN |
R/W |
0x0 |
When set, the timestamp signal is transmitted on the LSB of the output samples. The latency of the timestamp signal (through the entire chip) matches the latency of the analog ADC inputs. Also set SYNC_RECV_EN when using TIME_STAMP_EN.
Note 1: In 8-bit modes, the control bit is placed on the LSB of the 8-bit samples (leaving 7-bits of sample data). If the part is configured for 12-bit data, the control bit is placed on the LSB of the 12-bit bit data (leaving 11-bits of sample data).
Note 2: The control bit that is enabled by this register is never advertised in the ILA (CS is 0 in the ILA).
|