JAJSEY1C April 2019 – March 2022 ADC12DJ5200RF
ADC12DJ5200RF has a number of features that make it a great fit for oscilloscope applications. The low code-error rate (CER) eliminates concerns about undesired time domain glitches or sparkle codes. The low CER makes the device a perfect fit for long-duration transient detection measurements and reduces the probability of false triggers. The input common-mode voltage of 0 V allows the driving amplifiers to use equal split power supplies that center the amplifier output common-mode voltage at 0 V and eliminates the need for common-mode voltage shifting before the ADC inputs. The high input bandwidth of the device simplifies the design of the driving amplifier circuit and antialiasing, low-pass filter. The use of dual-edge sampling (DES) in single-channel mode eliminates the need to change the clock frequency when switching between dual- and single-channel modes and simplifies synchronization by relaxing the setup and hold timing requirements of SYSREF. The tAD adjust circuit allows the user to time-align the sampling instances of multiple ADC12DJ5200RF devices or to set the ideal sampling point of a front-end track and hold (T&H) amplifier.