JAJSEY1C April 2019 – March 2022 ADC12DJ5200RF
The ADC12DJ5200RF contains a function to gradually adjust the tAD adjust setting towards the newly written TAD_COARSE value. This functionality allows the tAD adjust setting to be adjusted with minimal internal clock circuitry glitches. The TAD_RAMP_RATE parameter allows either a slower (one TAD_COARSE LSB per 256 tCLK cycles) or faster ramp (four TAD_COARSE LSBs per 384 tCLK cycles) to be selected. The TAD_RAMP_EN parameter enables the ramp feature and any subsequent writes to TAD_COARSE initiate a new cramp.