JAJSEG5A January 2018 – October 2018 ADS112U04
During power up, the device is held in reset. The power-on reset releases approximately 600 µs after both supplies have exceeded their respective power-up reset thresholds. After this time all internal circuitry (including the voltage reference) are stable and communication with the device is possible. As part of the reset process, the device sets all bits in the configuration registers to the respective default settings. After power-up, the device enters a low-power state. The power-up behavior is intended to prevent systems with tight power-supply requirements from encountering a current surge during power-up.