SNLS592
December 2020
DS160PT801
ADVANCE INFORMATION
1
Features
2
Applications
3
Description
4
Revision History
5
Description (cont'd)
6
Device and Documentation Support
6.1
Device Support
6.1.1
Development Support
6.1.2
12.1.2 Device Nomenclature
6.2
Receiving Notification of Documentation Updates
6.3
Support Resources
6.4
Trademarks
6.5
Electrostatic Discharge Caution
6.6
Glossary
7
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
ACB|332
サーマルパッド・メカニカル・データ
発注情報
snls592_oa
1
Features
8-Lane (16-Channel) Protocol-Aware PCI-Express Retimer supporting 16.0, 8.0, 5.0, and 2.5 GT/s Interfaces
Inter-Chip Communication (ICC) Enable Dual Chip Link Width Scaling to form 16-Lane Gen-4 Retimer
Supports Common Clock, Separate Reference Clock with no SSC, and Separate Reference Clock with SSC
Supports 2x4 and 4x2 Bifurcation
Adaptive Receive CTLE and DFE Supporting Maximum PCIe Gen-4 Channel Loss
Supports Equalization Training
Low-Latency Architecture
On-Chip Eye Opening Monitor (EOM) and PCIe Receive Margining Capability
Small 8.5-mm x 13.4-mm BGA Package
Flow-Through Pinout Enables Signal Breakout in Two Signal Layers
Compatible with Standard 1.0-mm BGA PCB Manufacturing
Dual Power Supply: 1.1 V and 1.8 V
I2C Configuration (up to 1 MHz) via External EEPROM or I2C Master
Industrial Temperature Range: -40 °C to 85 °C