For operation in UPI 2.0 links, the DS160UP822 is designed with linear datapth to pass the Tx preset signaling (by root complex and end point) onto the Rx (of root complex and end point) to train and optimize the equalization settings. The linear redriver device helps extend the PCB trace reach distance by boosting the attenuated signals with its equalization, which allows the user to recover the signal by the downstream Rx more easily. The device must be placed in between the Tx and Rx (of root complex and end point) such a way that both RX and TX signal swing stays within the linearity range of the device. Adjustments to the device EQ setting should be performed based on the channel loss to optimize the eye opening in the Rx partner. The available EQ gain settings are provided in Table 7-1. For most systems the default DC gain setting GAIN = floating would be sufficient.

The DS160UP822 can be optimized for a given system utlizing its three configuration modes - Pin Mode, SMBus/I²C Master Mode and SMBus/I²C Slave Mode. In SMBus/I²C modes the SCL, SDA pins must be pulled up to a 3.3 V supply with a pull-up resistor. The value of the resistor depends on total bus capacitance. 4.7 kΩ is a good first approximation for a bus capacitance of 10 pF.

Figure 8-2 shows a simplified schematic for UPI 2x2 cross-point mux for x24 lane configuration in SMBus/I²C Master Mode.

Figure 8-2 Simplified Schematic for UPI 2x2 cross-point mux for x24Lane Configuration in SMBus/I²C Master Mode