The INA21x are 26-V, common-mode, zero-drift topology, current-sensing amplifiers that can be used in both low-side and high-side configurations. These specially-designed, current-sensing amplifiers are able to accurately measure voltages developed across current-sensing resistors on common-mode voltages that far exceed the supply voltage powering the device. Current can be measured on input voltage rails as high as 26 V while the device can be powered from supply voltages as low as 2.7 V.
The zero-drift topology enables high-precision measurements with maximum input offset voltages as low as
35 µV with a maximum temperature contribution of 0.5 µV/°C over the full temperature range of –40°C to +125°C.
Figure 23 shows the basic connections of the INA21x. Connect the input pins (IN+ and IN–) as closely as possible to the shunt resistor to minimize any resistance in series with the shunt resistor.
Power-supply bypass capacitors are required for stability. Applications with noisy or high-impedance power supplies may require additional decoupling capacitors to reject power-supply noise. Connect bypass capacitors close to the device pins.
On the RSW package options, two pins are provided for each input. Tie these pins together (that is, tie IN+ to IN+ and tie IN– to IN–).
The zero-drift offset performance of the INA21x offers several benefits. Most often, the primary advantage of the low offset characteristic enables lower full-scale drops across the shunt. For example, non-zero-drift current shunt monitors typically require a full-scale range of 100 mV.
The INA21x series gives equivalent accuracy at a full-scale range on the order of 10 mV. This accuracy reduces shunt dissipation by an order of magnitude with many additional benefits.
Alternatively, there are applications that must measure current over a wide dynamic range that can take advantage of the low offset on the low end of the measurement. Most often, these applications can use the lower gains of the INA213, INA214, or INA215 to accommodate larger shunt drops on the upper end of the scale. For instance, an INA213 operating on a 3.3-V supply can easily handle a full-scale shunt drop of 60 mV, with only 100 μV of offset.
An obvious and straightforward filtering location is at the device output. However, this location negates the advantage of the low output impedance of the internal buffer. The only other filtering option is at the device input pins. This location, though, does require consideration of the ±30% tolerance of the internal resistances. Figure 24 shows a filter placed at the inputs pins.
The addition of external series resistance, however, creates an additional error in the measurement so the value of these series resistors must be kept to 10 Ω (or less, if possible) to reduce impact to accuracy. The internal bias network shown in Figure 24 present at the input pins creates a mismatch in input bias currents when a differential voltage is applied between the input pins. If additional external series filter resistors are added to the circuit, the mismatch in bias currents results in a mismatch of voltage drops across the filter resistors. This mismatch creates a differential error voltage that subtracts from the voltage developed at the shunt resistor. This error results in a voltage at the device input pins that is different than the voltage developed across the shunt resistor. Without the additional series resistance, the mismatch in input bias currents has little effect on device operation. The amount of error these external filter resistors add to the measurement can be calculated using Equation 2 where the gain error factor is calculated using Equation 1.
The amount of variance in the differential voltage present at the device input relative to the voltage developed at the shunt resistor is based both on the external series resistance value as well as the internal input resistors, R3 and R4 (or RINT as shown in Figure 24). The reduction of the shunt voltage reaching the device input pins appears as a gain error when comparing the output voltage relative to the voltage across the shunt resistor. A factor can be calculated to determine the amount of gain error that is introduced by the addition of external series resistance. The equation used to calculate the expected deviation from the shunt voltage to what is measured at the device input pins is given in Equation 1:
With the adjustment factor from Equation 1, including the device internal input resistance, this factor varies with each gain version, as shown in Table 1. Each individual device gain error factor is shown in Table 2.
|PRODUCT||SIMPLIFIED GAIN ERROR FACTOR|
The gain error that can be expected from the addition of the external series resistors can then be calculated based on Equation 2:
For example, using an INA212 and the corresponding gain error equation from Table 2, a series resistance of
10 Ω results in a gain error factor of 0.982. The corresponding gain error is then calculated using Equation 2, resulting in a gain error of approximately 1.77% solely because of the external 10-Ω series resistors. Using an INA213 with the same 10-Ω series resistor results in a gain error factor of 0.991 and a gain error of 0.84% again solely because of these external resistors.
Although the INA21x series does not have a shutdown pin, the low power consumption of the device allows the output of a logic gate or transistor switch to power the INA21x. This gate or switch turns on and turns off the INA21x power-supply quiescent current.
However, in current shunt monitoring applications, there is also a concern for how much current is drained from the shunt circuit in shutdown conditions. Evaluating this current drain involves considering the simplified schematic of the INA21x in shutdown mode, as shown in Figure 25.
Note that there is typically slightly more than 1-MΩ impedance (from the combination of 1-MΩ feedback and
5-kΩ input resistors) from each input of the INA21x to the OUT pin and to the REF pin. The amount of current flowing through these pins depends on the respective ultimate connection. For example, if the REF pin is grounded, the calculation of the effect of the 1-MΩ impedance from the shunt to ground is straightforward. However, if the reference or op amp is powered while the INA21x is shut down, the calculation is direct; instead of assuming 1 MΩ to ground, however, assume 1 MΩ to the reference voltage. If the reference or op amp is also shut down, some knowledge of the reference or op amp output impedance under shutdown conditions is required. For instance, if the reference source behaves as an open circuit when not powered, little or no current flows through the 1-MΩ path.
Regarding the 1-MΩ path to the output pin, the output stage of a disabled INA21x does constitute a good path to ground. Consequently, this current is directly proportional to a shunt common-mode voltage present across a 1-MΩ resistor.
As a final note, when the device is powered up, there is an additional, nearly constant, and well-matched 25 μA that flows in each of the inputs as long as the shunt common-mode voltage is 3 V or higher. Below 2-V common-mode, the only current effects are the result of the 1-MΩ resistors.
As with any difference amplifier, the INA21x series common-mode rejection ratio is affected by any impedance present at the REF input. This concern is not a problem when the REF pin is connected directly to most references or power supplies. When using resistive dividers from the power supply or a reference voltage, the REF pin must be buffered by an op amp.
In systems where the INA21x output can be sensed differentially, such as by a differential input analog-to-digital converter (ADC) or by using two separate ADC inputs, the effects of external impedance on the REF input can be cancelled. Figure 26 depicts a method of taking the output from the INA21x by using the REF pin as a reference.
With a small amount of additional circuitry, the INA21x series can be used in circuits subject to transients higher than 26 V, such as automotive applications. Use only zener diode or zener-type transient absorbers (sometimes referred to as transzorbs) ;any other type of transient absorber has an unacceptable time delay. Start by adding a pair of resistors as a working impedance for the zener; see Figure 27. Keeping these resistors as small as possible is preferable, typically around 10 Ω. Larger values can be used with an effect on gain that is discussed in the Input Filtering section. Because this circuit limits only short-term transients, many applications are satisfied with a 10-Ω resistor along with conventional zener diodes of the lowest power rating that can be found. This combination uses the least amount of board space. These diodes can be found in packages as small as SOT-523 or SOD-523.
In the event that low-power zeners do not have sufficient transient absorption capability and a higher power transzorb must be used, the most package-efficient solution then involves using a single transzorb and back-to-back diodes between the device inputs. The most space-efficient solutions are dual series-connected diodes in a single SOT-523 or SOD-523 package. This method is shown in Figure 28. In either of these examples, the total board area required by the INA21x with all protective components is less than that of an SO-8 package, and only slightly greater than that of an MSOP-8 package.
Applications involving large input transients with excessive dV/dt above 2 kV per microsecond present at the device input pins may cause damage to the internal ESD structures on version A devices. This potential damage is a result of the internal latching of the ESD structure to ground when this transient occurs at the input. With significant current available in most current-sensing applications, the large current flowing through the input transient-triggered, ground-shorted ESD structure quickly results in damage to the silicon. External filtering can be used to attenuate the transient signal prior to reaching the inputs to avoid the latching condition. Care must be taken to ensure that external series input resistance does not significantly impact gain error accuracy. For accuracy purposes, keep these resistances under 10 Ω if possible. Ferrite beads are recommended for this filter because of their inherently low dc ohmic value. Ferrite beads with less than 10 Ω of resistance at dc and over 600 Ω of resistance at 100 MHz to 200 MHz are recommended. The recommended capacitor values for this filter are between 0.01 µF and 0.1 µF to ensure adequate attenuation in the high-frequency region. This protection scheme is shown in Figure 29.
To minimize the cost of adding these external components to protect the device in applications where large transient signals may be present, version B and C devices are now available with new ESD structures that are not susceptible to this latching condition. Version B and C devices are incapable of sustaining these damage-causing latched conditions so these devices do not have the same sensitivity to the transients that the version A devices have, thus making the version B and C devices a better fit for these applications.