JAJSCP8B November   2016  – March 2017 ISO7710

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 改訂履歴
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics—5-V Supply
    10. 6.10 Supply Current Characteristics—5-V Supply
    11. 6.11 Electrical Characteristics—3.3-V Supply
    12. 6.12 Supply Current Characteristics—3.3-V Supply
    13. 6.13 Electrical Characteristics—2.5-V Supply
    14. 6.14 Supply Current Characteristics—2.5-V Supply
    15. 6.15 Switching Characteristics—5-V Supply
    16. 6.16 Switching Characteristics—3.3-V Supply
    17. 6.17 Switching Characteristics—2.5-V Supply
    18. 6.18 Insulation Characteristics Curves
    19. 6.19 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Electromagnetic Compatibility (EMC) Considerations
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device I/O Schematics
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 関連リンク
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • D|8
  • DW|16
サーマルパッド・メカニカル・データ
発注情報

Specifications

Absolute Maximum Ratings

See (1)
MIN MAX UNIT
VCC1, VCC2 Supply voltage(2) –0.5 6 V
V Voltage at IN, OUT –0.5 VCC + 0.5(3) V
IO Output Current –15 15 mA
TJ Junction temperature 150 °C
Tstg Storage temperature –65 150 °C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values except differential I/O bus voltages are with respect to the local ground terminal (GND1 or GND2) and are peak voltage values.
Maximum voltage must not exceed 6 V.

ESD Ratings

VALUE UNIT
VESD Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) ±6000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±1500 V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

Recommended Operating Conditions

MIN NOM MAX UNIT
VCC1, VCC2 Supply voltage 2.25 5.5 V
VCC(UVLO+) UVLO threshold when supply voltage is rising 2 2.25 V
VCC(UVLO-) UVLO threshold when supply voltage is falling 1.7 1.8 V
VHYS(UVLO) Supply voltage UVLO hysteresis 100 200 mV
IOH High-level output current VCC2 = 5 V –4 mA
VCC2 = 3.3 V –2
VCC2 = 2.5 V –1
IOL Low-level output current VCC2 = 5 V 4 mA
VCC2 = 3.3 V 2
VCC2 = 2.5 V 1
VIH High-level input voltage 0.7 × VCC1 VCC1 V
VIL Low-level input voltage 0 0.3 × VCC1 V
DR Signaling rate 0 100 Mbps
TA Ambient temperature –55 25 125 °C

Thermal Information

THERMAL METRIC(1) ISO7710 UNIT
DW (SOIC) D (SOIC)
(16-Pin) (8-Pin)
RθJA Junction-to-ambient thermal resistance 94.4 146.1 °C/W
RθJC(top) Junction-to-case(top) thermal resistance 57.3 63.1 °C/W
RθJB Junction-to-board thermal resistance 57.1 80.0 °C/W
ψJT Junction-to-top characterization parameter 40.0 9.6 °C/W
ψJB Junction-to-board characterization parameter 56.8 79.0 °C/W
RθJC(bottom) Junction-to-case(bottom) thermal resistance n/a n/a °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

Power Ratings

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
PD Maximum power dissipation VCC1 = VCC2 = 5.5 V, TJ = 150°C, CL = 15 pF, input a 50 MHz 50% duty cycle square wave 50 mW
PD1 Maximum power dissipation by side-1 VCC1 = VCC2 = 5.5 V, TJ = 150°C, CL = 15 pF, input a 50 MHz 50% duty cycle square wave 12.5 mW
PD2 Maximum power dissipation by side-2 VCC1 = VCC2 = 5.5 V, TJ = 150°C, CL = 15 pF, input a 50 MHz 50% duty cycle square wave 37.5 mW

Insulation Specifications

PARAMETER TEST CONDITIONS VALUE UNIT
DW-16 D-8
CLR External clearance (1) Shortest terminal-to-terminal distance through air 8 4 mm
CPG External creepage (1) Shortest terminal-to-terminal distance across the package surface 8 4 mm
DTI Distance through the insulation Minimum internal gap (internal clearance) 21 21 μm
CTI Comparative tracking index DIN EN 60112 (VDE 0303-11); IEC 60112; UL 746A >600 >600 V
Material group According to IEC 60664-1 I I
Overvoltage category per IEC 60664-1 Rated mains voltage ≤ 150 VRMS I–IV I–IV
Rated mains voltage ≤ 300 VRMS I–IV I–III
Rated mains voltage ≤ 600 VRMS I–IV n/a
Rated mains voltage ≤ 1000 VRMS I–III n/a
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12(2)
VIORM Maximum repetitive peak isolation voltage AC voltage (bipolar) 1414 637 VPK
VIOWM Maximum working isolation voltage AC voltage; Time dependent dielectric breakdown (TDDB) test 1000 450 VRMS
DC voltage 1414 637 VDC
VIOTM Maximum transient isolation voltage VTEST = VIOTM
t = 60 s (qualification)
t= 1 s (100% production)
8000 4242 VPK
VIOSM Maximum surge isolation voltage(3) Test method per IEC 60065, 1.2/50 µs waveform,
VTEST = 1.6 × VIOSM (qualification)
8000 5000 VPK
qpd Apparent charge(4) Method a, After Input/Output safety test subgroup 2/3,
Vini = VIOTM, tini = 60 s; Vpd(m) = 1.2 × VIORM, tm = 10 s
≤5 ≤5 pC
Method a, After environmental tests subgroup 1,
Vini = VIOTM, tini = 60 s; Vpd(m) = 1.6 × VIORM, tm = 10 s
≤5 ≤5
Method b1; At routine test (100% production) and preconditioning (type test)
Vini = VIOTM, tini = 1 s; Vpd(m) = 1.875 × VIORM, tm = 1 s
≤5 ≤5
CIO Barrier capacitance, input to output(5) VIO = 0.4 × sin (2πft), f = 1 MHz ~0.4 ~0.4 pF
RIO Isolation resistance(5) VIO = 500 V, TA = 25°C >1012 >1012 Ω
VIO = 500 V, 100°C ≤ TA ≤ 125°C >1011 >1011
VIO = 500 V at TS = 150°C >109 >109
Pollution degree 2 2
Climatic category 55/125/21 55/125/21
UL 1577
VISO Withstanding isolation voltage VTEST = VISO, t = 60 s (qualification);
VTEST = 1.2 × VISO, t = 1 s (100% production)
5000 3000 VRMS
Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves and/or ribs on a printed circuit board are used to help increase these specifications.
This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits.
Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier.
Apparent charge is electrical discharge caused by a partial discharge (pd).
All pins on each side of the barrier tied together creating a two-terminal device.

Safety-Related Certifications

VDE, CSA, UL and TUV certifications for DW-16 package are complete; All other certifications are planned.
VDE CSA UL CQC TUV
Certified according to DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 Certified under CSA Component Acceptance Notice 5A, IEC 60950-1, and IEC 60601-1 Certified according to UL 1577 Component Recognition Program Plan to certify according to GB4943.1-2011 Certified according to EN 61010-1:2010 (3rd Ed) and EN 60950-1:2006/A11:2009/A1:2010/A12:2011/A2:2013
Maximum transient isolation voltage, 8000 VPK (DW-16, Reinforced) and 4242 VPK (D-8);
Maximum repetitive peak isolation voltage, 1414 VPK (DW-16, Reinforced) and 637 VPK (D-8);
Maximum surge isolation voltage, 8000 VPK (DW-16, Reinforced) and 5000 VPK (D-8)
Reinforced insulation per CSA 60950-1-07+A1+A2 and IEC 60950-1 2nd Ed.,
800 VRMS (DW-16) and 400 VRMS (D-8) max working voltage (pollution degree 2, material group I);
2 MOPP (Means of Patient Protection) per CSA 60601-1:14 and IEC 60601-1 Ed. 3.1, 250 VRMS (DW-16) max working voltage
DW-16: Single protection, 5000 VRMS ;

D-8: Single protection, 3000 VRMS
DW-16: Reinforced Insulation, Altitude ≤ 5000 m, Tropical Climate, 400 VRMS maximum working voltage;

D-8: Basic Insulation, Altitude ≤ 5000 m, Tropical Climate, 250 VRMS maximum working voltage
5000 VRMS (DW-16) and 3000 VRMS (D-8) Reinforced insulation per EN 61010-1:2010 (3rd Ed) up to working voltage of 600 VRMS (DW-16) and 300 VRMS (D-8)
5000 VRMS (DW-16) and 3000 VRMS (D-8) Reinforced insulation per EN 60950-1:2006/A11:2009/A1:2010/A12:2011/A2:2013 up to working voltage of 800 VRMS (DW-16) and 400 VRMS (D-8)
Certificate number: 40040142 Master contract number: 220991 File number: E181974 Certification Planned Client ID number: 77311

Safety Limiting Values

Safety limiting intends to minimize potential damage to the isolation barrier upon failure of input or output circuitry. A failure of the I/O can allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system failures.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DW-16 Package
IS Safety input, output, or supply current RθJA = 94.4 °C/W, VI = 5.5 V, TJ = 150°C, TA = 25°C, see Figure 1 241 mA
RθJA = 94.4 °C/W, VI = 3.6 V, TJ = 150°C, TA = 25°C, see Figure 1 368
RθJA = 94.4 °C/W, VI = 2.75 V, TJ = 150°C, TA = 25°C,
see Figure 1
482
PS Safety input, output, or total power RθJA = 94.4 °C/W, TJ = 150°C, TA = 25°C, see Figure 2 1324 mW
TS Maximum safety temperature 150 °C
D-8 Package
IS Safety input, output, or supply current RθJA = 146.1 °C/W, VI = 5.5 V, TJ = 150°C, TA = 25°C, see Figure 3 156 mA
RθJA = 146.1 °C/W, VI = 3.6 V, TJ = 150°C, TA = 25°C,
see Figure 3
238
RθJA = 146.1 °C/W, VI = 2.75 V, TJ = 150°C, TA = 25°C, see Figure 3 311
PS Safety input, output, or total power RθJA = 146.1 °C/W, TJ = 150°C, TA = 25°C, see Figure 4 856 mW
TS Maximum safety temperature 150 °C

The maximum safety temperature is the maximum junction temperature specified for the device. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the Thermal Information table is that of a device installed on a High-K test board for leaded surface mount packages. The power is the recommended maximum input voltage times the current. The junction temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance.

Electrical Characteristics—5-V Supply

VCC1 = VCC2 = 5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOH High-level output voltage IOH = –4 mA; see Figure 11 VCC2 – 0.4 4.8 V
VOL Low-level output voltage IOL = 4 mA; see Figure 11 0.2 0.4 V
VIT+(IN) Rising input threshold voltage 0.6 x VCC1 0.7 x VCC1 V
VIT-(IN) Falling input threshold voltage 0.3 x VCC1 0.4 x VCC1 V
VI(HYS) Input threshold voltage hysteresis 0.1 × VCC1 0.2 × VCC1 V
IIH High-level input current VIH = VCC1 at IN 10 μA
IIL Low-level input current VIL = 0 V at IN –10 μA
CMTI Common-mode transient immunity VI = VCC1 or 0 V, VCM = 1200 V; see Figure 13 85 100 kV/μs
CI Input Capacitance(1) VI = VCC/ 2 + 0.4×sin(2πft), f = 1 MHz, VCC = 5 V 2 pF
Measured from input pin to ground.

Supply Current Characteristics—5-V Supply

VCC1 = VCC2 = 5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS SUPPLY CURRENT MIN TYP MAX UNIT
Supply current - DC signal VI = VCC1 (ISO7710), VI = 0 V (ISO7710 with F suffix) ICC1 0.5 0.8 mA
ICC2 0.6 1
VI = 0 V (ISO7710), VI = VCC1 (ISO7710 with F suffix) ICC1 1.6 2.5
ICC2 0.6 1
Supply current - AC signal All channels switching with square wave clock input; CL = 15 pF 1 Mbps ICC1 1.1 1.5
ICC2 0.6 1.1
10 Mbps ICC1 1.1 1.6
ICC2 1.1 1.6
100 Mbps ICC1 1.4 2
ICC2 5.9 7

Electrical Characteristics—3.3-V Supply

VCC1 = VCC2 = 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOH High-level output voltage IOH = –2 mA; see Figure 11 VCC2 – 0.3 3.2 V
VOL Low-level output voltage IOL = 2 mA; see Figure 11 0.1 0.3 V
VIT+(IN) Rising input voltage threshold 0.6 x VCC1 0.7 x VCC1 V
VIT-(IN) Falling input voltage threshold 0.3 x VCC1 0.4 x VCC1 V
VI(HYS) Input threshold voltage hysteresis 0.1 × VCC1 0.2 × VCC1 V
IIH High-level input current VIH = VCC1 at IN 10 μA
IIL Low-level input current VIL = 0 V at IN –10 μA
CMTI Common-mode transient immunity VI = VCC1 or 0 V, VCM = 1200 V; see Figure 13 85 100 kV/μs

Supply Current Characteristics—3.3-V Supply

VCC1 = VCC2 = 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS SUPPLY CURRENT MIN TYP MAX UNIT
Supply current - DC signal VI = VCC1 (ISO7710), VI = 0 V (ISO7710 with F suffix) ICC1 0.5 0.8 mA
ICC2 0.6 1
VI = 0 V (ISO7710), VI = VCC1 (ISO7710 with F suffix) ICC1 1.6 2.5
ICC2 0.6 1
Supply current - AC signal All channels switching with square wave clock input; CL = 15 pF 1 Mbps ICC1 1.1 1.5
ICC2 0.6 1
10 Mbps ICC1 1 1.6
ICC2 1.1 1.4
100 Mbps ICC1 1.3 1.8
ICC2 4.3 5.3

Electrical Characteristics—2.5-V Supply

VCC1 = VCC2 = 2.5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOH High-level output voltage IOH = –1 mA; see Figure 11 VCC2 – 0.2 2.45 V
VOL Low-level output voltage IOL = 1 mA; see Figure 11 0.05 0.2 V
VIT+(IN) Rising input voltage threshold 0.6 x VCC1 0.7 x VCC1 V
VIT-(IN) Falling input voltage threshold 0.3 x VCC1 0.4 x VCC1 V
VI(HYS) Input threshold voltage hysteresis 0.1 × VCC1 0.2 × VCC1 V
IIH High-level input current VIH = VCC1 at IN 10 μA
IIL Low-level input current VIL = 0 V at IN –10 μA
CMTI Common-mode transient immunity VI = VCC1 or 0 V, VCM = 1200 V; see Figure 13 85 100 kV/μs

Supply Current Characteristics—2.5-V Supply

VCC1 = VCC2 = 2.5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS SUPPLY CURRENT MIN TYP MAX UNIT
Supply current - DC signal VI = VCC1 (ISO7710), VI = 0 V (ISO7710 with F suffix) ICC1 0.5 0.8 mA
ICC2 0.6 1
VI = 0 V (ISO7710), VI = VCC1 (ISO7710 with F suffix) ICC1 1.6 2.5
ICC2 0.6 1
Supply current - AC signal All channels switching with square wave clock input; CL = 15 pF 1 Mbps ICC1 1.1 1.5
ICC2 0.6 1
10 Mbps ICC1 1.1 1.5
ICC2 0.9 1.4
100 Mbps ICC1 1.2 1.6
ICC2 3.4 4.4

Switching Characteristics—5-V Supply

VCC1 = VCC2 = 5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time See Figure 11 6 11 16 ns
PWD Pulse width distortion(1) |tPHL – tPLH| 0.6 4.9 ns
tsk(pp) Part-to-part skew time(2) 4.5 ns
tr Output signal rise time See Figure 11 1.8 3.9 ns
tf Output signal fall time 1.9 3.9 ns
tDO Default output delay time from input power loss Measured from the time VCC1 goes below 1.7 V. See Figure 12 0.1 0.3 μs
tie Time interval error 216 – 1 PRBS data at 100 Mbps 1 ns
Also known as pulse skew.
tsk(pp) is the magnitude of the difference in propagation delay times between terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads.

Switching Characteristics—3.3-V Supply

VCC1 = VCC2 = 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time See Figure 11 6 11 16 ns
PWD Pulse width distortion(1) |tPHL – tPLH| 0.1 5 ns
tsk(pp) Part-to-part skew time(2) 4.5 ns
tr Output signal rise time See Figure 11 0.7 3 ns
tf Output signal fall time 0.7 3 ns
tDO Default output delay time from input power loss Measured from the time VCC1 goes below 1.7 V. See Figure 12 0.1 0.3 μs
tie Time interval error 216 – 1 PRBS data at 100 Mbps 1 ns
Also known as pulse skew.
tsk(pp) is the magnitude of the difference in propagation delay times between terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads.

Switching Characteristics—2.5-V Supply

VCC1 = VCC2 = 2.5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time See Figure 11 7.5 12 18.5 ns
PWD Pulse width distortion(1) |tPHL – tPLH| 0.2 5.1 ns
tsk(pp) Part-to-part skew time(2) 4.6 ns
tr Output signal rise time See Figure 11 1 3.5 ns
tf Output signal fall time 1 3.5 ns
tDO Default output delay time from input power loss Measured from the time VCC1 goes below 1.7 V. See Figure 12 0.1 0.3 μs
tie Time interval error 216 – 1 PRBS data at 100 Mbps 1 ns
Also known as pulse skew.
tsk(pp) is the magnitude of the difference in propagation delay times between terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads.

Insulation Characteristics Curves

ISO7710 D001_SLLSER9.gif Figure 1. Thermal Derating Curve for Limiting Current per VDE for DW-16 Package
ISO7710 D003_SLLSER9.gif Figure 3. Thermal Derating Curve for Limiting Current per VDE for D-8 Package
ISO7710 D002_SLLSER9.gif Figure 2. Thermal Derating Curve for Limiting Power per VDE for DW-16 Package
ISO7710 D004_SLLSER9.gif Figure 4. Thermal Derating Curve for Limiting Power per VDE for D-8 Package

Typical Characteristics

ISO7710 D005_SLLSER9.gif
TA = 25°C CL = 15 pF
Figure 5. ISO7710 Supply Current vs Data Rate
(With 15 pF Load)
ISO7710 D011_SLLSEP4.gif
TA = 25°C
Figure 7. High-Level Output Voltage vs High-level
Output Current
ISO7710 D009_SLLSER9.gif
Figure 9. Power Supply Undervoltage Threshold vs
Free-Air Temperature
ISO7710 D006_SLLSER9.gif
TA = 25°C CL = No Load
Figure 6. ISO7710 Supply Current vs Data Rate
(With No Load)
ISO7710 D012_SLLSEP4.gif
TA = 25°C
Figure 8. Low-Level Output Voltage vs Low-Level
Output Current
ISO7710 D010_SLLSER9.gif
Figure 10. Propagation Delay Time vs Free-Air Temperature