JAJSLV5H December   2003  – June 2025 LM2901-Q1 , LM2901AV-Q1 , LM2901B-Q1 , LM2901V-Q1

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 説明
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings for  LM2901B-Q1
    2. 5.2  Absolute Maximum Ratings for LM2901x-Q1
    3. 5.3  ESD Ratings
    4. 5.4  Recommended Operating Conditions for LM2901B-Q1
    5. 5.5  Recommended Operating Conditions for LM2901x-Q1
    6. 5.6  Thermal Information
    7. 5.7  Electrical Characteristics for LM2901B-Q1
    8. 5.8  Switching Characteristics for LM2901B-Q1
    9. 5.9  Electrical Characteristics for LM2901x-Q1
    10. 5.10 Switching Characteristics for LM2901x-Q1
    11. 5.11 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram Schematic (Each Comparator)
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Voltage Comparison
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input Voltage Range
        2. 7.2.2.2 Minimum Overdrive Voltage
        3. 7.2.2.3 Output and Drive Current
        4. 7.2.2.4 Response Time
      3. 7.2.3 Application Curves
      4. 7.2.4 アプリケーション情報に関する免責事項
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Related Links
    3. 8.3 Trademarks
    4. 8.4 静電気放電に関する注意事項
    5. 8.5 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • D|14
  • PW|14
サーマルパッド・メカニカル・データ
発注情報

Feature Description

The comparator consists of a PNP darlington pair input, allowing the device to operate with very high gain and fast response with minimal input bias current. The input Darlington pair creates a limit on the input common mode voltage capability, allowing the comparator to accurately function from ground to VCC– 2V over temperature. On the non-B devices, a clamp was added around Q3 to mimic the both inputs above input voltage range behavior of the original classic silicon.

The output consists of an open drain NPN (pull-down or low side) transistor. The output NPN sinks current when the negative input voltage is higher than the positive input voltage and the offset voltage. The VOL is resistive and scales with the output current. Please see the "Output Low Voltage vs. Output Sinking Current" graphs for VOL values with respect to the output current.