SNOSDA4B June   2020  – December 2020 LM339LV , LM393LV

PRODMIX  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
    1. 5.1 Pin Functions: LM393LV
    2. 5.2 Pin Functions: LM339LV
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information, LM393LV
    5. 6.5  Thermal Information, LM339LV
    6. 6.6  Electrical Characteristics, LM393LV
    7. 6.7  Switching Characteristics, LM393LV
    8. 6.8  Electrical Characteristics, LM339LV
    9. 6.9  Switching Characteristics, LM339LV
    10. 6.10 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Open Drain Output
      2. 7.4.2 Power-On Reset (POR)
      3. 7.4.3 Inputs
        1. 7.4.3.1 Rail to Rail Input
        2. 7.4.3.2 Fault Tolerant Inputs
        3. 7.4.3.3 Input Protection
      4. 7.4.4 ESD Protection
      5. 7.4.5 Unused Inputs
      6. 7.4.6 Hysteresis
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Basic Comparator Definitions
        1. 8.1.1.1 Operation
        2. 8.1.1.2 Propagation Delay
        3. 8.1.1.3 Overdrive Voltage
      2. 8.1.2 Hysteresis
        1. 8.1.2.1 Inverting Comparator With Hysteresis
        2. 8.1.2.2 Non-Inverting Comparator With Hysteresis
    2. 8.2 Typical Applications
      1. 8.2.1 Window Comparator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Square-Wave Oscillator
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
      3. 8.2.3 Adjustable Pulse Width Generator
      4. 8.2.4 Time Delay Generator
      5. 8.2.5 Logic Level Shifter
      6. 8.2.6 One-Shot Multivibrator
      7. 8.2.7 Bi-Stable Multivibrator
      8. 8.2.8 Zero Crossing Detector
      9. 8.2.9 Pulse Slicer
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Pulse Slicer

A Pulse Slicer is a variation of the Zero Crossing Detector and is used to detect the zero crossings on an input signal with a varying baseline level. This circuit works best with symmetrical waveforms. The RC network of R1 and C1 establishes an mean reference voltage VREF, which tracks the mean amplitude of the VIN signal. The noninverting input is directly connected to VREF through R2. R2 and R3 are used to produce hysteresis to keep transitions free of spurious toggles. The time constant is a tradeoff between long-term symmetry and response time to changes in amplitude.

If the waveform is data, it is recommended that the data be encoded in NRZ (Non-Return to Zero) format to maintain proper average baseline. Asymmetrical inputs may suffer from timing distortions caused by the changing VREF average voltage.

GUID-14C578E8-0300-4453-819C-77555656792F-low.gifFigure 8-18 Pulse Slicer

For this design, follow these design requirements:

  • The RC constant value (R2 and C1) must support the targeted data rate in order to maintain a valid tripping threshold.
  • The hysteresis introduced with R2 and R43 helps to avoid spurious output toggles.

Figure 8-19 shows the results of a 9600 baud data signal riding on a varying baseline.

GUID-4368F1EB-4917-43C2-8FEC-44466991207C-low.gifFigure 8-19 Pulse Slicer Waveforms