JAJSLR9I February   2006  – May 2021 LM5009

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Control Circuit Overview
      2. 7.3.2 High Voltage Startup Regulator
      3. 7.3.3 Regulation Comparator
      4. 7.3.4 Overvoltage Comparator
      5. 7.3.5 On-Time Generator
      6. 7.3.6 Current Limit
      7. 7.3.7 N-Channel Buck Switch and Driver
      8. 7.3.8 Thermal Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Resistor Divider Selection
        2. 8.2.2.2 Frequency Selection
        3. 8.2.2.3 Inductor Selection
        4. 8.2.2.4 VCC and Bootstrap Capacitor
        5. 8.2.2.5 Output Capacitor Selection
        6. 8.2.2.6 Current Limit Off-Timer Setting
        7. 8.2.2.7 Rectifier Diode Selection
        8. 8.2.2.8 Input Capacitor Selection
        9. 8.2.2.9 Ripple Configuration
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.2.8 Input Capacitor Selection

C1: The purpose of this capacitor is to supply most of the switch current during the on-time and to limit the voltage ripple at VIN, on the assumption that the voltage source feeding VIN has an output impedance greater than zero. At maximum load current, when the buck switch turns on, the current into pin 8 suddenly increases to the lower peak of the output current waveform, ramps up to the peak value, and then drops to zero at turn-off. The average input current during this on-time is the load current (150 mA). For a worst-case calculation, C1 must supply this average load current during the maximum on-time. To keep the input voltage ripple to less than 2 V (for this exercise), C1 calculates to Equation 11:

Equation 11. GUID-CD7B1DA5-AD61-4572-9E7E-3DCD2CFB1171-low.gif

Quality ceramic capacitors in this value have a low ESR that adds only a few millivolts to the ripple. The capacitance is dominant in this case. To allow for the capacitor tolerance, temperature effects, and voltage effects, a 1.0-µF, 100-V, X7R capacitor is used.

C5: This capacitor helps avoid supply voltage transients and ringing resulting from long lead inductance at VIN. A low-ESR, 0.1-µF ceramic chip capacitor is recommended, located close to the LM5009.