GaN devices do not have body diodes, but is still
able to conduct current in third-quadrant (source to drain) when it is OFF. However,
the voltage drop of GaN devices is higher than that of Si diodes during
third-quadrant conduction. This results in higher power loss if not handled
properly. The excessive loss can be observed in prolonged dead time or
cycle-by-cycle current limit mode, leading to overtemperature, which could trigger
protective shut down. To mitigate this problem, a Sync-FET Mode operation is
implemented in the power IC.
Figure 9-5 shows how Sync-FET Mode operation achieves adaptive dead time and reduces
third-quadrant loss in a boost converter. Before IN Pin of the free-wheeling IC goes
high, the IC is able to detect the third-quadrant current and automatically turn ON
GaN device after td(idm_on), typically around 35ns. When IN Pin of the
free-wheeling IC goes low, GaN device is turned OFF. After turn-off transient, there
is a blanking time, t3rd_Blank, typically around 115ns, to prevent the
unwanted re-turn on during dead time.
A state machine has been also used to
summarize the Sync-FET Mode operation. Please see Figure 9-6. In a half bridge:
For the hard-switching IC in
a half bridge
When IN Pin goes
high, GaN device is always turned ON, and the hard-switching IC
starts conducting first-quadrant current.
When IN Pin goes low,
GaN device is turned OFF, and the hard-switching IC starts blocking
positive VDS.
When
t3rd_Blank expires, GaN device stays OFF, and the
hard-switching IC starts detecting first-quadrant current, including
both conduction and leakage current.
When leakage current
and positive VDS presents, GaN device stays OFF and keeps
blocking before IN Pin of the hard-switching IC goes high.
For the free-wheeling IC in a half bridge
When IN Pin goes
high, GaN device is always turned ON, and the free-wheeling IC
starts conducting third-quadrant current at negative VDS,
product of negative ID and RDS(on).
When IN Pin goes low,
GaN device is turned OFF, and the free-wheeling IC starts conducting
third-quadrant current at VSD, third-quadrant mode
source-drain voltage.
When
t3rd_Blank expires, GaN device stays OFF and
continues third-quadrant conduction, and the free-wheeling IC starts
detecting first-quadrant current, including both conduction and
leakage current.
When first-quadrant
current and positive VDS presents at turn ON of the
hard-switching IC, GaN device stays OFF but starts blocking, and the
free-wheeling IC starts detecting third-quadrant current.
When third-quadrant
current and negative VDS presents at turn OFF of the hard
switching IC, GaN device stays OFF during detection,
t3rd_Det, and then is turned ON by Sync-FET Mode. In
Sync-FET Mode, the free-wheeling IC keeps detecting first-quadrant
current, including both conduction and leakage current, before IN
Pin goes high.
If first-quadrant
current presents before IN Pin goes high, GaN device will be turned
OFF, and the free-wheeling IC will NOT be turned ON again by
Sync-FET Mode before IN Pin goes high.
Figure 9-5 Dead Time Reduction In Sync
Mode Operation