SBOS730A April   2015  – May 2015 LMH6401


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 SPI Timing Requirements
    7. 7.7 Typical Characteristics
  8. Parameter Measurement Information
    1. 8.1 Setup Diagrams
    2. 8.2 Output Measurement Reference Points
    3. 8.3 ATE Testing and DC Measurements
    4. 8.4 Frequency Response
    5. 8.5 Distortion
    6. 8.6 Noise Figure
    7. 8.7 Pulse Response, Slew Rate, and Overdrive Recovery
    8. 8.8 Power Down
    9. 8.9 VOCM Frequency Response
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
      1. 9.4.1 Power-On Reset (POR)
      2. 9.4.2 Power-Down (PD)
      3. 9.4.3 Thermal Feedback Control
      4. 9.4.4 Gain Control
    5. 9.5 Programming
      1. 9.5.1 Details of the Serial Interface
      2. 9.5.2 Timing Diagrams
    6. 9.6 Register Maps
      1. 9.6.1 Revision ID (address = 0h, Read-Only) [default = 03h]
      2. 9.6.2 Product ID (address = 1h, Read-Only) [default = 00h]
      3. 9.6.3 Gain Control (address = 2h) [default = 20h]
      4. 9.6.4 Reserved (address = 3h) [default = 8Ch]
      5. 9.6.5 Thermal Feedback Gain Control (address = 4h) [default = 27h]
      6. 9.6.6 Thermal Feedback Frequency Control (address = 5h) [default = 45h]
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Analog Input Characteristics
      2. 10.1.2 Analog Output Characteristics
        1. Driving Capacitive Loads
      3. 10.1.3 Thermal Feedback Control
        1. Step Response Optimization using Thermal Feedback Control
      4. 10.1.4 Thermal Considerations
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. Driving ADCs
          1. SNR Considerations
          2. SFDR Considerations
          3. ADC Input Common-Mode Voltage Considerations—AC-Coupled Input
          4. ADC Input Common-Mode Voltage Considerations—DC-Coupled Input
      3. 10.2.3 Application Curves
    3. 10.3 Do's and Don'ts
      1. 10.3.1 Do:
      2. 10.3.2 Don't:
  11. 11Power-Supply Recommendations
    1. 11.1 Single-Supply Operation
    2. 11.2 Split-Supply Operation
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Examples
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Community Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information



8 Parameter Measurement Information

8.1 Setup Diagrams

LMH6401 FrequencyResponseTest_SBOS730_LMH6401.gifFigure 43. Frequency Response Differential Test Setup
LMH6401 SingleToneTest_SBOS730_LMH6401.gifFigure 44. Single-Tone Harmonic Distortion Test Setup
LMH6401 MultiToneTest_SBOS730_LMH6401.gifFigure 45. Two-Tone Linearity Test Setup (OIP3, OIP2)
LMH6401 NoiseFigureTest_SBOS730_LMH6401.gifFigure 46. Noise Figure Test Setup

8.2 Output Measurement Reference Points

The LMH6401 has two on-chip, 10-Ω output resistors. When matching the output to a 100-Ω load, the evaluation module (EVM) uses an external 40-Ω resistor on each output leg to complete the output matching. Having on-chip output resistors creates two potential reference points for measuring the output voltage. The first reference point is at the internal amplifier output (OUT_AMP), and the second reference point is at the externally-matched 100-Ω load (OUT_LOAD). The measurements in the Electrical Characteristics table and in the Typical Characteristics section are referred to the (OUT_AMP) reference point unless otherwise specified. The conversion between reference points is a straightforward correction of 3 dB for power and 6 dB for voltage, as shown in Equation 1 and Equation 2. The measurements are referenced to OUT_AMP when not specified.

Equation 1. VOUT_LOAD = (VOUT_AMP – 6 dB)
Equation 2. POUT_LOAD = (POUT_AMP – 3 dB)

8.3 ATE Testing and DC Measurements

All production testing and dc parameters are measured on automated test equipment capable of dc measurements only. Some measurements (such as voltage gain) are referenced to the output of the internal amplifier and do not include losses attributed to the on-chip output resistors. The Electrical Characteristics values specify these conditions. When the measurement is referred to the amplifier output, the output resistors are not included in the measurement. If the measurement is referred to the device pins, then the output resistor loss is included in the measurement.

8.4 Frequency Response

This test is done by running an S-parameter sweep on a 4-port differential network analyzer using the standard EVM with no baluns; see Figure 43. The inputs and outputs of the EVM are connected to the network analyzer using 50-Ω coaxial cables with all the ports set to a characteristic impedance (ZO) of 50 Ω.

The frequency response test with capacitive load is done by soldering the capacitor across the LMH6401 output pins. In this configuration, the on-chip, 10-Ω resistors on each output leg isolate the capacitive load from the amplifier output pins.

8.5 Distortion

The standard EVM is used for measuring both the single-tone harmonic distortion and two-tone intermodulation distortion; see Figure 44 and Figure 45, respectively. The distortion is measured with differential input signals to the LMH6401. In order to interface with single-ended test equipment, external baluns (1:2, ZO = 50 Ω) are required between the EVM output ports and the test equipment. The Typical Characteristics plots are created with Marki™ baluns, model number BAL-0010. These baluns are used to combine two single tones in the two-tone test plots as well as convert the single-ended input to differential output for harmonic distortion tests. The use of 6-dB attenuator pads on both the inputs and outputs is recommended to provide a balanced match between the external balun and the EVM.

8.6 Noise Figure

This test is done by matching the input of the LMH6401 to a 50-Ω noise source using a 1:2 balun (see Figure 46), with the noise figure being referred to the input impedance (RS = 100 Ω). As noted in Figure 46, an Agilent E4443A with NF features is used for the testing.

8.7 Pulse Response, Slew Rate, and Overdrive Recovery

For time-domain measurements, the standard EVM is driven through a balun again to convert a single-ended output from the test equipment to the differential inputs of the LMH6401. The differential outputs are directly connected to the oscilloscope inputs, with the differential signal response calculated using trace math from the two separate oscilloscope inputs.

8.8 Power Down

The standard EVM is used for this test by completely removing the shorting block on jumper JPD. A high-speed, 50-Ω pulse generator is used to drive the PD pin, which toggles the output signal on or off depending upon the PD pin voltage.

8.9 VOCM Frequency Response

The standard EVM is used for this test. A network analyzer is connected to the VOCM input of the EVM and the EVM outputs are connected to the network analyzer with 50-Ω coaxial cables. The network analyzer analysis mode is set to single-ended input and differential output, and the output common-mode response is measured with respect to the single-ended input (Scs21). The input signal frequency is swept with the signal level set for 100 mV (–16 dBm). Note that the common-mode control circuit gain is approximately one.