The LMR436x0-Q1 reduces frequency whenever output voltage is high. This function is enabled whenever the internal error amplifier compensation output, COMP, an internal signal, is low and there is an offset between the regulation set point of VOUT/FB and the voltage applied to VOUT/FB. The net effect is that there is larger output impedance while lightly loaded in auto mode than in normal operation. Output voltage must be approximately 1% high when the part is completely unloaded.
In PFM operation, a small DC positive offset is required on the output voltage to activate the PFM detector. The lower the frequency in PFM, the more DC offset is needed on VOUT. If the DC offset on VOUT is not acceptable, a dummy load at VOUT or FPWM mode can be used to reduce or eliminate this offset.