|fVLO||VLO frequency||Measured at MCLK||3 V||10||kHz|
|dfVLO/dT||VLO frequency temperature drift||Measured at MCLK(1)||3 V||0.5||%/°C|
|dfVLO/dVCC||VLO frequency supply voltage drift||Measured at MCLK(2)||1.8 V to 3.6 V||4||%/V|
|fVLO,DC||Duty cycle||Measured at MCLK||3 V||50%|
The VLO clock frequency is reduced by 15% (typical) when the device switches from active mode to LPM3 or LPM4, because the reference changes. This lower frequency is not a violation of the VLO specifications (see Section 184.108.40.206).