JAJSMD4D December   2003  – March 2022 OPA1632


  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: OPA1632D
    6. 6.6 Electrical Characteristics: OPA1632DGN
    7. 6.7 Typical Characteristics: OPA1632D
    8. 6.8 Typical Characteristics: OPA1632DGN
  7. Detailed Description
    1. 7.1 Overview
      1. 7.1.1 Fully-Differential Amplifiers
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Function
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Output Common-Mode Voltage
        1. Resistor Matching
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 PowerPAD Design Considerations
      2. 10.1.2 Power Dissipation and Thermal Considerations
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Third-Party Products Disclaimer
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Export Control Notice
    8. 11.8 Glossary
  12. 12Mechanical, Packaging, and Orderable Information



Layout Guidelines

  1. The PowerPAD is electrically isolated from the silicon and all leads. Connecting the PowerPAD to any potential voltage between the power-supply voltages is acceptable, but it is recommended to tie to ground because it is generally the largest conductive plane.
  2. Prepare the PCB with a top-side etch pattern, as shown in Figure 10-1. There should be etch for the leads as well as etch for the thermal pad.
  3. Place five holes in the area of the thermal pad. These holes should be 13 mils (0,03302 cm) in diameter. Keep them small so that solder wicking through the holes is not a problem during reflow.
  4. Additional vias may be placed anywhere along the thermal plane outside of the thermal pad area. These vias help dissipate the heat generated by the OPA1632 IC, and may be larger than the 13-mil diameter vias directly under the thermal pad. They can be larger because they are not in the thermal pad area to be soldered so that wicking is not a problem.
  5. Connect all holes to the internal ground plane.
  6. When connecting these holes to the plane, do not use the typical web or spoke via connection methodology. Web connections have a high thermal resistance connection that is useful for slowing the heat transfer during soldering operations. This makes the soldering of vias that have plane connections easier. In this application, however, low thermal resistance is desired for the most efficient heat transfer. Therefore, the holes under the OPA1632 PowerPAD package should make their connection to the internal plane with a complete connection around the entire circumference of the plated-through hole.
  7. The top-side solder mask should leave the terminals of the package and the thermal pad area with its five holes exposed. The bottom-side solder mask should cover the five holes of the thermal pad area. This prevents solder from being pulled away from the thermal pad area during the reflow process.
  8. Apply solder paste to the exposed thermal pad area and all of the IC terminals.

    With these preparatory steps in place, the IC is simply placed in position and runs through the solder reflow operation as any standard surface-mount component. This results in a part that is properly installed.

GUID-21CF93DE-4B24-4A7E-B2E0-680B011A0BDA-low.gifFigure 10-1 PowerPAD PCB Etch and Via Pattern