JAJSS69B September   2000  – April 2024 OPA627 , OPA637

PRODMIX  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information: OPA627
    5. 5.5 Thermal Information: OPA637
    6. 5.6 Electrical Characteristics: OPA627BU, OPA627AU
    7. 5.7 Electrical Characteristics: OPA627AM, OPA627BM, OPA627SM
    8. 5.8 Electrical Characteristics: OPA637
    9. 5.9 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Offset Voltage Adjustment
      2. 6.3.2 Noise Performance
      3. 6.3.3 Input Bias Current
      4. 6.3.4 Phase-Reversal Protection
      5. 6.3.5 Output Overload
      6. 6.3.6 Capacitive Loads
      7. 6.3.7 Input Protection
      8. 6.3.8 EMI Rejection Ratio (EMIRR)
        1. 6.3.8.1 EMIRR IN+ Test Configuration
      9. 6.3.9 Settling Time
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
        2. 8.1.1.2 Analog Filter Designer
        3. 8.1.1.3 TI のリファレンス・デザイン
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

4 Pin Configuration and Functions

OPA627 OPA637 D Package, 8-Pin SOIC (Top View)Figure 4-1 D Package, 8-Pin SOIC (Top View)
Table 4-1 Pin Functions: D (SOIC) Package
PIN TYPE DESCRIPTION
NO. NAME
1, 5, 8 NC — No internal connection (can be left floating)
2 –IN Input Inverting input
3 +IN Input Noninverting input
4 V– Power Negative (lowest) power supply
6 OUT Output Output
7 V+ Power Positive (highest) power supply
Figure 4-2 LMC Package, 8-Pin TO-99 (Top View)
Table 4-2 Pin Functions: LMC (TO-99) Package
PIN TYPE DESCRIPTION
NO. NAME
1, 5 Offset Trim — Input offset voltage trim (float this pin if unused)
2 –IN Input Inverting input
3 +IN Input Noninverting input
4 V– Power Negative (lowest) power supply
6 OUT Output Output
7 V+ Power Positive (highest) power supply
8 NC — No internal connection (float this pin)