JAJSHS6D August   2019  – July 2020 OPA810

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: 10 V
    6. 7.6  Electrical Characteristics: 24 V
    7. 7.7  Electrical Characteristics: 5 V
    8. 7.8  Typical Characteristics: VS = 10 V
    9. 7.9  Typical Characteristics: VS = 24 V
    10. 7.10 Typical Characteristics: VS = 5 V
    11. 7.11 Typical Characteristics: ±2.375-V to ±12-V Split Supply
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 OPA810 Architecture
      2. 8.3.2 ESD Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Split-Supply Operation (±2.375 V to ±13.5 V)
      2. 8.4.2 Single-Supply Operation (4.75 V to 27 V)
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Amplifier Gain Configurations
      2. 9.1.2 Selection of Feedback Resistors
      3. 9.1.3 Noise Analysis and the Effect of Resistor Elements on Total Noise
    2. 9.2 Typical Applications
      1. 9.2.1 Transimpedance Amplifier
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 High-Z Input Data Acquisition Front-End
      3. 9.2.3 Multichannel Sensor Interface
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Thermal Considerations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Selection of Feedback Resistors

The OPA810 is a classic voltage feedback amplifier with each channel having two high-impedance inputs and a low-impedance output. Standard application circuits (as shown in Figure 9-3 and Figure 9-4) include the noninverting and inverting gain configurations. The DC operating point for each configuration is level-shifted by the reference voltage VREF which is typically set to midsupply in single-supply operation. VREF is often connected to ground in split-supply applications.

GUID-B4252BA1-FDB6-40B4-A58C-5FB9C242362B-low.gif Figure 9-3 Noninverting Amplifier
GUID-9AFAE228-D5C8-4463-A47E-13983CCF419F-low.gif Figure 9-4 Inverting Amplifier

Equation 3 shows the closed-loop gain of an amplifier in noninverting configuration.

Equation 3. GUID-512D0DD6-2F48-42B7-BB8E-181C83AEB621-low.gif

Equation 4 shows the closed-loop gain of an amplifier in an inverting configuration.

Equation 4. GUID-F7571EAB-B964-4A2A-8CA1-7EA8ECD83936-low.gif

The magnitude of the low-frequency gain is determined by the ratio of the magnitudes of the feedback resistor (RF) and the gain setting resistor RG. The order of magnitudes of the individual values of RF and RG offer a trade-off between amplifier stability, power dissipated in the feedback resistor network, and total output noise. The feedback network increases the loading on the amplifier output. Using large values of the feedback resistors reduces the power dissipated at the amplifier output. On the other hand, this increases the inherent voltage and amplifier current noise contribution seen at the output while lowering the frequency at which a pole occurs in the feedback factor (β). This pole causes a decrease in the phase margin at zero-gain crossover frequency and potential instability. Using small feedback resistors increases power dissipation and also degrades amplifier linearity due to a heavier amplifier output load. Figure 9-5 illustrates a representative schematic of the OPA810 in an inverting configuration with the input capacitors shown.

GUID-41CB8411-B3D5-4755-A6C8-7079BB00388F-low.gif Figure 9-5 Inverting Amplifier with Input Capacitors

The effective capacitance at the amplifier inverting input pin is shown in Equation 5, which forms a pole in β at a cut-off frequency of Equation 6.

Equation 5. GUID-F026A044-8435-483C-B198-130579E7209E-low.gif

where

  • CCM is the amplifier common-mode input capacitance
  • CDIFF is the amplifier differential input capacitance
  • CPCB is the PCB parasitic capacitance
Equation 6. GUID-E66B0854-46CF-44BA-A5CA-60671FFCC7CB-low.gif

For low-power systems, greater the values of the feedback resistors, the earlier in frequency does the phase margin begin to reduce and cause instability. Figure 9-6 and Figure 9-7 illustrate the loop gain magnitude and phase plots, respectively, for the OPA810 simulation in TINA-TI configured as an inverting amplifier with values of feedback resistors varying by orders of magnitudes.

GUID-2EB10A2E-E462-417E-BA44-6E8276AF8945-low.gifFigure 9-6 Loop-Gain vs Frequency for Circuit of Figure 9-5
GUID-B7E2EB30-04A5-45E7-B27D-35ECB86028B8-low.gifFigure 9-7 Loop-Gain Phase vs Frequency for Circuit of Figure 9-5

A lower phase margin results in peaking in the frequency response and lower bandwidth as Figure 9-8 shows, which is synonymous with overshoot and ringing in the pulse response results. The OPA810 offers a flat-band voltage noise density of 6.3 nV/√ Hz. TI recommends selecting an RF so the voltage noise contribution does not exceed that of the amplifier. Figure 9-9 shows the voltage noise density variation with value of resistance at 25°C. A 2-kΩ resistor exhibits a thermal noise density of 5.75 nV/√ Hz which is comparable to the flatband noise of the OPA810. Hence, TI recommends using an RF lower than 2 kΩ while being large enough to not dissipate excessive power for the output voltage swing and supply current requirements of the application. The Section 9.1.3 section shows a detailed analysis of the various contributors to noise.

GUID-F14D0777-4120-45B0-AFFB-2200DC034FB3-low.gifFigure 9-8 Closed-Loop Gain vs. Frequency for Circuit of Figure 9-5
GUID-6D61167B-A740-414F-8E0E-49C3CD346F41-low.gifFigure 9-9 Thermal Noise Density vs Resistance