JAJSHS6D August   2019  – July 2020 OPA810

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: 10 V
    6. 7.6  Electrical Characteristics: 24 V
    7. 7.7  Electrical Characteristics: 5 V
    8. 7.8  Typical Characteristics: VS = 10 V
    9. 7.9  Typical Characteristics: VS = 24 V
    10. 7.10 Typical Characteristics: VS = 5 V
    11. 7.11 Typical Characteristics: ±2.375-V to ±12-V Split Supply
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 OPA810 Architecture
      2. 8.3.2 ESD Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Split-Supply Operation (±2.375 V to ±13.5 V)
      2. 8.4.2 Single-Supply Operation (4.75 V to 27 V)
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Amplifier Gain Configurations
      2. 9.1.2 Selection of Feedback Resistors
      3. 9.1.3 Noise Analysis and the Effect of Resistor Elements on Total Noise
    2. 9.2 Typical Applications
      1. 9.2.1 Transimpedance Amplifier
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 High-Z Input Data Acquisition Front-End
      3. 9.2.3 Multichannel Sensor Interface
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Thermal Considerations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Amplifier Gain Configurations

The OPA810 is a classic voltage-feedback amplifier with each channel having two high-impedance inputs and a low-impedance output. Standard application circuits (as shown in Figure 9-1 and Figure 9-2) include the noninverting and inverting gain configurations. The DC operating point for each configuration is level-shifted by the reference voltage VREF that is typically set to midsupply in single-supply operation. VREF is often connected to ground in split-supply applications.

GUID-FD61A859-CAB9-4661-B2D1-7225A74C5545-low.gif Figure 9-1 Noninverting Amplifier
GUID-97C7410E-18DC-4A1F-989A-A30D51B98713-low.gif Figure 9-2 Inverting Amplifier

Equation 1 shows the closed-loop gain of an amplifier in a noninverting configuration.

Equation 3. GUID-512D0DD6-2F48-42B7-BB8E-181C83AEB621-low.gif

Equation 2 shows the closed-loop gain of an amplifier in an inverting configuration.

Equation 4. GUID-F7571EAB-B964-4A2A-8CA1-7EA8ECD83936-low.gif