JAJSOS8C September   2013  – June 2022 SN74LV1T00

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Related Products
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Operating Characteristics
    8. 7.8 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Clamp Diode Structure
      2. 9.3.2 Balanced CMOS Push-Pull Outputs
      3. 9.3.3 LVxT Enhanced Input Voltage
        1. 9.3.3.1 Down Translation
        2. 9.3.3.2 Up Translation
    4. 9.4 Device Functional Modes
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 サポート・リソース
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Device Functional Modes

Function Table lists the functional modes of the SN74LV1T00.

Table 9-1 Function Table
INPUTS(1)
(Lower Level Input)
OUTPUT
(VCC CMOS)(2)
A B Y
H H L
L X H
X L H
SUPPLY VCC = 3.3V
A B Y
VIH(min) =1.35 V VOH(min) = 2.9 V
VIL(max) =0.8 V VOL(max)= 0.2 V
H = High Voltage Level, L = Low Voltage Level, X = Do not Care, Z = High Impedance
H = Driving High, L = Driving Low, Z = High Impedance State