SCES424L January   2003  – May 2017 SN74LVC1G3157

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Analog Switch Characteristics
    7. 6.7 Switching Characteristics 85°C
    8. 6.8 Switching Characteristics 125°C
    9. 6.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • DBV|6
  • DSF|6
  • DRL|6
  • YZP|6
  • DCK|6
  • DTB|6
  • DRY|6
サーマルパッド・メカニカル・データ
発注情報

Specifications

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage(2) –0.5 6.5 V
VIN Control input voltage(2)(3) –0.5 6.5 V
VI/O Switch I/O voltage(2)(3)(4)(5) –0.5 VCC + 0.5 V
IIK Control input clamp current VIN < 0 –50 mA
II/OK I/O port diode current VI/O < 0 or VI/O > VCC ±50 mA
II/O On-state switch current(6) VI/O = 0 to VCC ±128 mA
Continuous current through VCC or GND ±100 mA
TJ Junction temperature 150 °C
Tstg Storage temperature –65 150 °C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to ground unless otherwise specified.
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
This value is limited to 5.5 V maximum.
VI, VO, VA, and VBn are used to denote specific conditions for VI/O.
II, IO, IA, and IBn are used to denote specific conditions for II/O.

ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage 1.65 5.5 V
VI/O Switch input or output voltage 0 VCC V
VIN Control input voltage 0 5.5 V
VIH High-level input voltage, control input VCC = 1.65 V to 1.95 V VCC × 0.75 V
VCC = 2.3 V to 5.5 V VCC × 0.7
VIL Low-level input voltage, control input VCC = 1.65 V to 1.95 V VCC × 0.25 V
VCC = 2.3 V to 5.5 V VCC × 0.3
Δt/Δv Input transition rise or fall rate VCC = 1.65 V to 1.95 V 20 ns/V
VCC = 2.3 V to 2.7 V 20
VCC = 3 V to 3.6 V 10
VCC = 4.5 V to 5.5 V 10
TA Operating free-air temperature BGA package (YZP) –40 85 °C
All other packages (DBV, DCK, DRL, DRY, DSF) –40 125 °C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See the TI application report, Implications of Slow or Floating CMOS Inputs (SCBA004).

Thermal Information

THERMAL METRIC(1) SN74LVC1G3157 UNIT
DBV (SOT-23) DCK (SC70) DRL (SOT) DRY (SON) DTB (X2SON) YZP (DSBGA)
6 PINS 6 PINS 6 PINS 6 PINS 6 PINS 6 PINS
RθJA Junction-to-ambient thermal resistance 234.9 269.5 244.1 284.2 324.5 129.4 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 150.4 189.5 112.5 138.6 150.5 1.9 °C/W
RθJB Junction-to-board thermal resistance 86.4 84.7 109.9 170.9 239.0 40.0 °C/W
ψJT Junction-to-top characterization parameter 60.8 62.7 9.3 13.7 17.2 0.6 °C/W
ψJB Junction-to-board characterization parameter 86.1 84.0 109.3 167.9 238.3 40.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a n/a n/a n/a n/a °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC TA = -40 to 85°C TA = -40 to 125°C UNIT
MIN TYP(1) MAX MIN TYP(1) MAX
ron ON-state switch resistance(2) See Figure 1 and Figure 2 VI = 0 V IO = 4 mA 1.65 V 11 20 11 20 Ω
VI = 1.65 V IO = –4 mA 15 50 15 50
VI = 0 V IO = 8 mA 2.3 V 8 12 8 12
VI = 2.3 V IO = –8 mA 11 30 11 30
VI = 0 V IO = 24 mA 3 V 7 9 7 9
VI = 3 V IO = –24 mA 9 20 9 20
VI = 0 V IO = 30 mA 4.5 V 6 7 6 7
VI = 2.4 V IO = –30 mA 7 12 7 12
VI = 4.5 V IO = –30 mA 7 15 7 15
rrange ON-state switch resistance over signal range(2)(3) 0 ≤ VBn ≤ VCC
(see Figure 1 and Figure 2)
IA = –4 mA 1.65 V 140 140 Ω
IA = –8 mA 2.3 V 45 45
IA = –24 mA 3 V 18 18
IA = –30 mA 4.5 V 10 10
Δron Difference of ON-state
resistance between switches(2)(4)(5)
See Figure 2 VBn = 1.15 V IA = –4 mA 1.65 V 0.5 0.5 Ω
VBn = 1.6 V IA = –8 mA 2.3 V 0.1 0.3
VBn = 2.1 V IA = –24 mA 3 V 0.1 0.3
VBn = 3.15 V IA = –30 mA 4.5 V 0.1 0.2
ron(flat) ON resistance flatness(2)(4)(6) 0 ≤ VBn ≤ VCC IA = –4 mA 1.65 V 110 110 Ω
IA = –8 mA 2.3 V 26 40
IA = –24 mA 3 V 9 10
IA = –30 mA 4.5 V 4 5
Ioff(7) OFF-state switch leakage current 0 ≤ VI, VO ≤ VCC
(see Figure 3 )
1.65 V to
5.5 V
±1 ±1 µA
±0.05 ±0.1(1) ±0.05 ±0.1
IS(on) ON-state switch leakage current VI = VCC or GND, VO = Open
(see Figure 4)
5.5 V ±1 ±1 µA
±0.1(1) ±0.1(1)
IIN Control input current 0 ≤ VIN  ≤ VCC 0 V to 5.5 V ±1 ±1 µA
±0.05 ±0.1(1) ±0.05 ±0.1
ICC Supply current S = VCC or GND 5.5 V 1 10 35 µA
ΔICC Supply-current change S = VCC – 0.6 V 5.5 V 500 500 µA
Ci Control input capacitance S 5 V 2.7 2.7 pF
Cio(off) Switch input/output capacitance Bn 5 V 5.2 5.2 pF
Cio(on) Switch input/output capacitance Bn 5 V 17.3 17.3 pF
A 17.3 17.3
TA = 25°C
Measured by the voltage drop between I/O pins at the indicated current through the switch. ON-state resistance is determined by the lower of the voltages on the two (A or B) ports.
Specified by design
Δron = ron(max) – ron(min) measured at identical VCC, temperature, and voltage levels
This parameter is characterized, but not production tested.
Flatness is defined as the difference between the maximum and minimum values of on-state resistance over the specified range of conditions.
Ioff is the same as IS(off) (off-state switch leakage current).

Analog Switch Characteristics

TA = 25°C
PARAMETER FROM
(INPUT)
TO
(OUTPUT)
TEST CONDITIONS VCC TYP UNIT
Frequency response(1)
(switch on)
A or Bn Bn or A RL = 50 Ω, fin = sine wave
(see Figure 6)
1.65 V 340 MHz
2.3 V 340
3 V 340
4.5 V 340
Crosstalk(2)
(between switches)
B1 or B2 B2 or B1 RL = 50 Ω, fin = 10 MHz (sine wave)
(see Figure 7)
1.65 V –54 dB
2.3 V –54
3 V –54
4.5 V –54
Feed through attenuation(2)
(switch off)
A or Bn Bn or A CL = 5 pF, RL = 50 Ω,
fin = 10 MHz (sine wave)
(see Figure 8)
1.65 V –57 dB
2.3 V –57
3 V –57
4.5 V –57
Charge injection S A CL = 0.1 nF, RL = 1 MΩ
(see Figure 9)
3.3 V 3 pC
5 V 7
Total harmonic distortion A or Bn Bn or A VI = 0.5 Vp-p, RL = 600 Ω,
fin = 600 Hz to 20 kHz (sine wave)
(see Figure 10)
1.65 V 0.1%
2.3 V 0.025%
3 V 0.015%
4.5 V 0.01%
Set fin to 0 dBm and provide a bias of 0.4 V. Increase fin frequency until the gain is 3 dB below the insertion loss.
Set fin to 0 dBm and provide a bias of 0.4 V.

Switching Characteristics 85°C

TA = –40 to +85°C (see Figure 5 and )Figure 11
PARAMETER FROM
(INPUT)
TO
(OUTPUT)
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
tpd(1) A or Bn Bn or A 2 1.2 0.8 0.3 ns
ten(2) S Bn 7 24 3.5 14 2.5 7.6 1.7 5.7 ns
tdis(3) 3 13 2 7.5 1.5 5.3 0.8 3.8
tB-M 0.5 0.5 0.5 0.5 ns
tpd is the slower of tPLH or tPHL. The propagation delay is calculated RC time constant of the typical ON-state resistance of the switch and the specified load capacitance when driven by an ideal voltage source (zero output impedance).
ten is the slower of tPZL or tPZH.
tdis is the slower of tPLZ or tPHZ.

Switching Characteristics 125°C

TA = –40 to +125°C (see Figure 5 and Figure 11)
PARAMETER FROM
(INPUT)
TO
(OUTPUT)
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
tpd(1) A or Bn Bn or A 2 1.2 0.8 0.5 ns
ten(2) S Bn 1 24.5 1 14.5 2.5 8 1.7 6 ns
tdis(3) 2.5 13.5 2 8 1.5 5.5 0.8 4
tB-M 0.5 0.5 0.5 0.5 ns

Typical Characteristics

SN74LVC1G3157 typron_ces424.gif
Figure 1. Typical ron as a Function of Input Voltage (VI) for VI = 0 to VCC