JAJSIB3D August   2017  – February 2021 THS4561


  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS+ – VS– = 5 V to 12 V
    6. 7.6 Typical Characteristics: (VS+) – (VS–) = 12 V
    7. 7.7 Typical Characteristics: (VS+) – (VS–) = 5 V
    8. 7.8 Typical Characteristics: (VS+) – (VS–) = 3 V
    9. 7.9 Typical Characteristics: (VS+) – (VS–) = 3-V to 12-V Supply Range
  8. Parameter Measurement Information
    1. 8.1 Example Characterization Circuits
    2. 8.2 Output Interface Circuit for DC-Coupled Differential Testing
    3. 8.3 Output Common-Mode Measurements
    4. 8.4 Differential Amplifier Noise Measurements
    5. 8.5 Balanced Split-Supply Versus Single-Supply Characterization
    6. 8.6 Simulated Characterization Curves
    7. 8.7 Terminology and Application Assumptions
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
      1. 9.4.1 Power-Down Mode
      2. 9.4.2 Single-Ended Source to Differential Output Mode
        1. AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversions
        2. DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversions
      3. 9.4.3 Differential Input to a Differential Output Mode
        1. AC-Coupled, Differential-Input to Differential-Output Design Issues
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Differential Open-Loop Gain and Output Impedance
      2. 10.1.2 Setting Resistor Values Versus Gain
      3. 10.1.3 Noise Analysis
      4. 10.1.4 Factors Influencing Harmonic Distortion
      5. 10.1.5 Input Overdrive Performance
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Board Layout Recommendations
    2. 12.2 Layout Examples
  13. 13Device and Documentation Support
    1. 13.1 ドキュメントの更新通知を受け取る方法
    2. 13.2 サポート・リソース
    3. 13.3 Trademarks
    4. 13.4 静電気放電に関する注意事項
    5. 13.5 用語集
  14. 14Mechanical, Packaging, and Orderable Information



Example Characterization Circuits

The THS4561 offers the advantages of a fully differential amplifier (FDA) design with the trimmed input offset voltage and low drift of a precision op amp. The FDA is a flexible device where the main aim is to provide a purely differential output signal centered on a user-configurable common-mode voltage usually matched to the input common-mode voltage required by an analog-to-digital converter (ADC) following the FDA stage. The primary options revolve around the choices of single-ended or differential inputs, AC-coupled or DC-coupled signal paths, gain targets, and resistor value selections. The characterization circuits described in this section focus on single-ended input to differential output designs as the more challenging application requirement. Differential sources are supported and are simple to implement and analyze.

The characterization circuits are typically operated with a single-ended, matched, 50-Ω, input termination to a differential output at the FDA output pins because most lab equipment is single-ended. The FDA differential output is then translated back to single-ended through a variety of baluns (or transformers) depending on the test and frequency range. DC-coupled step response testing uses two 50-Ω scope inputs with trace math to measure the differential output. Single-supply operation is most common in end equipment designs. However, using split balanced supplies allows simple ground referenced testing without adding further blocking capacitors in the signal path beyond those capacitors already within the test equipment. The starting point for any single-ended input to differential output measurements (such as any of the frequency response curves) is shown in Figure 8-1.

GUID-2EC1B6F7-4D38-4EA8-8B8B-E67CF6FBECCF-low.gifFigure 8-1 Single-Ended Source to a Differential Gain of a 1-V/V Test Circuit

Most characterization plots fix the RF (RF1 = RF2) value at 1.5 kΩ, as shown in Figure 8-1. This element value is flexible in application, but 1.5 kΩ provides a good compromise for the parasitic issues linked to this value, specifically:

  • Added output loading: The FDA functions similarly to an inverting op amp design with feedback resistors appearing as an added load across the outputs (the approximate total differential load in Figure 8-1 is 1.5 kΩ || 1 kΩ = 857 Ω). The 1.5-kΩ value reduces the power dissipated in the feedback networks.
  • Noise contributions resulting from resistor values. These contributions are both the 4kTRF terms and the current noise times the RF term referred to the output (see Section 10.1.3).
  • Parasitic feedback pole at the input summing nodes. This pole is created by the feedback resistor (RF) value and the 2.4-pF differential input capacitance (as well as any board layout parasitic) and introduces a zero in the noise gain, which decreases the phase margin in most situations. This effect must be managed for best frequency response flatness or step response overshoot.

The frequency domain characterization curves start with the circuit and component selections of Figure 8-1. Some of the features in this test circuit include:

  • The elements on the non-signal input side match the signal input resistors. This feature closely matches the divider networks on each side of the FDA. The three resistors (RG2, RT2, and RS1) on the non-signal input side can be replaced by a single resistor to ground using a standard value of 1.5 kΩ with some loss in gain balancing between the two sides.
  • Translating from a 1-kΩ differential load to a 50-Ω environment introduces considerable insertion loss in the measurements (–31.8 dB in Figure 8-1). The measurement path insertion loss normalizes when reporting the frequency response curves to show the gain response to the FDA output pins.
  • In the pass band for the output balun, the 50-Ω load of the network analyzer reflects in parallel with the 52.3-Ω shunt termination, RM. These elements combine to show a differential 1-kΩ load at the output pins of the THS4561. The source impedance presented to the balun is a differential 50-Ω source. Figure 8-2 and Figure 8-3 show the TINA-TI™ model (available as a TINA-TI™ simulation file) and resulting response flatness for this relatively low-frequency balun providing 0.1-dB flatness through 100 MHz.
GUID-377084BB-A66B-4D4A-AC63-9107B1F7A1BC-low.gifFigure 8-2 Output Measurement Balun Simulation Circuit in TINA-TI™
GUID-5D50233D-D4ED-4624-9885-CDA96EA642B4-low.gifFigure 8-3 Output Measurement Balun Flatness Test

Starting from the test circuit of Figure 8-1, various elements are modified to show the effect of these elements over a range of design targets, specifically:

  • The gain setting is changed by adjusting the two RT and the RG resistors to provide a 50-Ω input match and setting the feedback resistors to 1.5 kΩ.
  • Resistive and capacitive output load testing. Changing to lower resistive loads is accomplished by adding parallel resistors across the output pins in Figure 8-1. Changing to capacitive loads adds series output resistors to a differential capacitance before the 1-kΩ sense path of Figure 8-1.
  • Power-supply settings. Most often, balanced bipolar supplies are used; a 12-V tests use ±6-V supplies, 5-V tests use ±2.5-V supplies, and 3-V tests use ±1.5-V supplies with the VOCM input control grounded.
  • The disable control pin (PD) is tied to the positive supply (VS+) for any active channel test.