JAJSDR6C August   2017  – February 2022 TIC12400-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  VS Pin
      2. 8.3.2  VDD Pin
      3. 8.3.3  Device Initialization
      4. 8.3.4  Device Trigger
      5. 8.3.5  Device Reset
        1. 8.3.5.1 VS Supply POR
        2. 8.3.5.2 Hardware Reset
        3. 8.3.5.3 Software Reset
      6. 8.3.6  VS Under-Voltage (UV) Condition
      7. 8.3.7  VS Over-Voltage (OV) Condition
      8. 8.3.8  Switch Inputs Settings
        1. 8.3.8.1 Input Current Source and Sink Selection
        2. 8.3.8.2 Input Mode Selection
        3. 8.3.8.3 Input Enable Selection
        4. 8.3.8.4 Thresholds Adjustment
        5. 8.3.8.5 Wetting Current Configuration
      9. 8.3.9  Interrupt Generation and INT Assertion
        1. 8.3.9.1 INT Pin Assertion Scheme
        2. 8.3.9.2 Interrupt Idle Time (tINT_IDLE) Time
        3. 8.3.9.3 Microcontroller Wake-Up
        4. 8.3.9.4 Interrupt Enable or Disable and Interrupt Generation Conditions
        5. 8.3.9.5 Detection Filter
      10. 8.3.10 Temperature Monitor
        1. 8.3.10.1 Temperature Warning (TW)
        2. 8.3.10.2 Temperature Shutdown (TSD)
      11. 8.3.11 Parity Check and Parity Generation
      12. 8.3.12 Cyclic Redundancy Check (CRC)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Continuous Mode
      2. 8.4.2 Polling Mode
        1. 8.4.2.1 Standard Polling
        2. 8.4.2.2 Matrix polling
      3. 8.4.3 Additional Features
        1. 8.4.3.1 Clean Current Polling (CCP)
        2. 8.4.3.2 Wetting Current Auto-Scaling
        3. 8.4.3.3 VS Measurement
        4. 8.4.3.4 Wetting Current Diagnostic
        5. 8.4.3.5 ADC Self-Diagnostic
    5. 8.5 Programming
      1. 8.5.1 SPI Communication Interface Buses
        1. 8.5.1.1 Chip Select ( CS)
        2. 8.5.1.2 System Clock (SCLK)
        3. 8.5.1.3 Slave In (SI)
        4. 8.5.1.4 Slave Out (SO)
      2. 8.5.2 SPI Sequence
        1. 8.5.2.1 Read Operation
        2. 8.5.2.2 Write Operation
        3. 8.5.2.3 Status Flag
    6. 8.6 Register Maps
    7. 8.7 Programming Guidelines
  9. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Using TIC12400-Q1 in a 12 V Automotive System
    3. 9.3 Resistor-coded Switches Detection in Automotive Body Control Module
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
      3. 9.3.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 サポート・リソース
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.3.2 Detailed Design Procedure

Table 9-5 Detailed Design Procedure
STEP 1STEP 2STEP 3STEP 4STEP 5
Equivalent Resistance Value (Ω)VINX (V)VINX + VGND_SHIFT(V)ADC Code SpreadThreshold
MINMAXMINMAXMINMAXMINMAX
State 1: Both SW1 and SW2 open5000∞> 6 V->6 V-1023-
State 2: SW1 open and SW2 closed555.95678.032.5023.7291.5024.729256806915
State 3: SW1 closed and SW2 open049.500.27201.2720217237

use the following procedures to calculate thresholds to program to the TIC12400-Q1 for proper switch detection:

  1. Calculate the equivalent resistance values at different switch states, taking into account RDIRT and the 8% resistance variation.
  2. Estimate the voltage established when wetting current flows through the switch by utilizing the relationship VINX = RSW_EQU × IWETT_ACT, where RSW_EQU is the equivalent switch resistance value and IWETT_ACT is the actual wetting current flowing through the switch. The 5 mA wetting current setting is selected in this design, because it best uses the dynamic range of the ADC (from 0 to 6 V). The wetting current, however, can vary depending on manufacturing process variation and operating temperature, and needs to be taken into account. Referring to the electrical table of the TIC12400-Q1 and assuming enough headroom for the current source (CSO) to operate, the 5 mA wetting current setting produces current ranging between 4.5 mA and 5.5 mA (for VS – INX ≥ 3 V condition). The voltage established on the TIC12400-Q1 input pin (VINX) can be calculated accordingly.

  3. Take the ground shift non-ideality into account. As defined in Section 9.3.1, the ground shift can vary between ±1 V. Therefore, effectively, the actual voltage seen at the TIC12400-Q1 can also vary up to ±1 V.
  4. Convert the voltage established on the INx pin into equivalent ADC code. The full-scale range of the 10-bit ADC is from 0 V to 6 V, with 6 V corresponding to the max code of 1023. Therefore, the ADC code spread for each of the 3 different switch states can be calculated accordingly.
  5. After the ADC code spread for each switch state is calculated, the detection threshold can be chosen to be the mid-point between the upper and lower codes of two neighboring states to give best margin for detection.