JAJSHO6F March   2005  – July 2019 TL431-Q1 , TL432-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: TL43x-Q1
    6. 6.6 Electrical Characteristics: TL43xA-Q1
    7. 6.7 Electrical Characteristics: TL43xB-Q1
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Open Loop (Comparator)
      2. 8.4.2 Closed Loop
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Comparator Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Basic Operation
          2. 9.2.1.2.2 Overdrive
          3. 9.2.1.2.3 Output Voltage and Logic Input Level
          4. 9.2.1.2.4 Input Resistance
          5. 9.2.1.2.5 Deviation Parameters and Calculating Dynamic Impedance
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Other Application Circuits
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 関連リンク
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DBZ|3
サーマルパッド・メカニカル・データ
発注情報

9.2.1.2.3 Output Voltage and Logic Input Level

For the TL43x-Q1 to properly be used as a comparator, the logic output must be readable by the receiving logic device. This is accomplished by knowing the input high and low level threshold voltage levels, typically denoted by VIH and VIL.

As seen in Figure 26, the TL43x-Q1's output low level voltage in open-loop or comparator mode is approximately 2 V, which is typically sufficient for 5-V supplied logic. However, would not work for 3.3-V and 1.8-V supplied logic. To accommodate this a resistive divider can be tied to the output to attenuate the output voltage to a voltage legible to the receiving low voltage logic device.

The TL43x-Q1's output high voltage is equal to VSUP due to the TL43x-Q1 being open-collector. If VSUP is much higher than the receiving logic's maximum input voltage tolerance, the output must be attenuated to accommodate the outgoing logic's reliability.

When using a resistive divider on the output, ensure the sum of the resistive divider (R1 and R2 in Figure 24) is much greater than RSUP to not interfere with the TL43x-Q1's ability to pull close to VSUP when turning off.