SLVS561L December   2004  – October 2014 TLV1117


  1. Features
  2. Applications
  3. Description
  4. Simplified Schematic
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Handling Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 TLV1117C Electrical Characteristics
    4. 6.4 TLV1117I Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 NPN Output Drive
      2. 7.3.2 Overload Block
      3. 7.3.3 Programmable Feedback
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal operation
      2. 7.4.2 Operation With Low Input Voltage
      3. 7.4.3 Operation at Light Loads
      4. 7.4.4 Operation in Self Protection
  8. Application and Implementation
    1. 8.1 Typical Application
      1. 8.1.1 Design Requirements
      2. 8.1.2 Detailed Design Procedure
      3. 8.1.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Glossary
  12. 12Mechanical, Packaging, and Orderable Information



  • KVU|3
  • DRJ|8
  • DCY|4
  • KCS|3
  • KTT|3
  • KCT|3

7 Detailed Description

7.1 Overview

The TLV1117 device is a positive low-dropout voltage regulator designed to provide up to 800 mA of output current. The device is available in 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V, and adjustable-output voltage options. All internal circuitry is designed to operate down to 1-V input-to-output differential. Dropout voltage is specified at a maximum of 1.3 V at 800 mA, decreasing at lower load currents.

The TLV1117 device is designed to be stable with tantalum and aluminum electrolytic output capacitors having an ESR between 0.2 Ω and 10 Ω.

Unlike pnp-type regulators, in which up to 10% of the output current is wasted as quiescent current, the quiescent current of the TLV1117 device flows into the load, increasing efficiency.

The TLV1117C device is characterized for operation over the virtual junction temperature range of 0°C to 125°C, and the TLV1117I device is characterized for operation over the virtual junction temperature range of –40°C to 125°C.

7.2 Functional Block Diagram

Functional Block Diagram


7.3 Feature Description

7.3.1 NPN Output Drive

NPN output topology provides lower output impedance than most LDOs. However, an output capacitor is required. To support maximum current and lowest temperature, 1.4-V headroom is recommended (less for lower currents) (VI – VO).

7.3.2 Overload Block

Current limiting and over temperature shutdown protects against overload or under heat sinking.

7.3.3 Programmable Feedback

Op amp with 1.25-V offset input at the ADJUST pin provides easy output voltage programming. For current regulation applications, a single resistor whose resistance value is 1.25 V / IOUT and power rating is greater than (1.25 V)2 / R should be used. For voltage regulation applications, two resistors set the output voltage.

7.4 Device Functional Modes

7.4.1 Normal operation

The device OUTPUT pin will source current necessary to make OUTPUT pin 1.25 V greater than ADJUST terminal to provide output regulation.

7.4.2 Operation With Low Input Voltage

The adjustable version of the device requires 1-V headroom (VI – VO) to operate in regulation. With less headroom, the device may drop out and OUTPUT voltage will be INPUT voltage minus drop out voltage.

7.4.3 Operation at Light Loads

The device passes its bias current to the OUTPUT pin. The load or feedback must consume this minimum current for regulation or the output may be too high.

7.4.4 Operation in Self Protection

When an overload occurs the device will shut down the output stage or reduce the output current to prevent device damage. The device will automatically reset from the overload. The output may be reduced or alternate between on and off until the overload is removed.