JAJSJB1D June   2021  – July 2022 TLV3601-Q1 , TLV3602-Q1 , TLV3603-Q1

PRODMIX  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Diagrams
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Inputs
      2. 7.4.2 Push-Pull (Single-Ended) Output
      3. 7.4.3 Known Startup Condition
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjustable Hysteresis
      2. 8.1.2 Capacitive Loads
      3. 8.1.3 Latch Functionality
    2. 8.2 Typical Application
      1. 8.2.1 Implementing Hysteresis
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Optical Receiver
      3. 8.2.3 Over-Current Latch Condition
      4. 8.2.4 External Trigger Function for Oscilloscopes
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Over-Current Latch Condition

When it is important for a system to detect a brief over-current condition, it is advisable to utilize the latching feature of the TLV3603-Q1. By latching the comparator output, the MCU is reassured not to miss the over-current occurrence. The circuit below shows one way to implement the latching function.

When an over-current condition is detected by the TLV3603-Q1, the output will go high. The occurrence of the output going high coupled with a logic high from the RESET signal from the MCU will create a logic low signal at the output of the 2-channel NAND gate. This will cause the output of the TLV3603-Q1 to be held in a logic high state (latched), thus allowing the MCU to detect the fault condition regardless of how narrow the over-current condition persists. The addition of the NAND gate also provides a means of clearing the latch state of the comparator once the MCU is done processing the event. This is accomplished by the MCU passing a logic low state to the NAND input causing the LE/HYS pin of the comparator to be returned to a logic high state. The TLV3603-Q1 latched status is cleared and the TLV3603-Q1 output can continue to track the status of the input pins.

Figure 8-10 Over-Current Latched Output Circuit.