The XRSn pin can be driven externally by a supervisor or an external pullup resistor, see Table 4-1
. On-chip POR logic will hold this pin low until the supplies are in a valid range.
After reset from any source (see Section 22.214.171.124
), the boot ROM code samples Boot Mode pins. Based on the status of the Boot Mode pin, the boot code branches to destination memory or boot code function. If boot ROM code executes after power-on conditions (in debugger environment), the boot code execution time is based on the current SYSCLK speed. The SYSCLK will be based on user environment and could be with or without PLL enabled.