JAJSF90F October   2017  – December 2021 TPS2662

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Undervoltage Lockout (UVLO)
      2. 9.3.2 Overvoltage Protection (OVP)
      3. 9.3.3 Hot Plug-In and Inrush Current Control
      4. 9.3.4 Reverse Polarity Protection
        1. 9.3.4.1 Input Side Reverse Polarity Protection
        2. 9.3.4.2 Output Side Reverse Polarity Protection
      5. 9.3.5 Overload and Short-Circuit Protection
        1. 9.3.5.1 Overload Protection
        2.       28
        3. 9.3.5.2 Short-Circuit Protection
          1. 9.3.5.2.1 Start-Up With Short-Circuit On Output
      6. 9.3.6 Reverse Current Protection
      7. 9.3.7 FAULT Response
      8. 9.3.8 IN, OUT, RTN, and GND Pins
      9. 9.3.9 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Low Current Shutdown Control (SHDN)
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Step-by-Step Design Procedure
        2. 10.2.2.2 Programming the Current Limit Threshold R(ILIM) Selection
        3. 10.2.2.3 Undervoltage Lockout and Overvoltage Set Point
        4. 10.2.2.4 Setting Output Voltage Ramp Time—(tdVdT)
          1. 10.2.2.4.1 Case 1: Start-Up Without Load—Only Output Capacitance C(OUT) Draws Current During Start-Up
          2. 10.2.2.4.2 Case 2: Start-Up With Load —Output Capacitance C(OUT) and Load Draws Current During Start-Up
          3. 10.2.2.4.3 Support Component Selections – R FLT and C(IN)
      3. 10.2.3 Application Curves
    3. 10.3 System Examples
      1. 10.3.1 Field Supply Protection in PLC, DCS I/O Modules
      2. 10.3.2 Simple 24-V Power Supply Path Protection
      3. 10.3.3 Power Stealing in Smart Thermostat
    4. 10.4 Do's and Don'ts
  11. 11Power Supply Recommendations
    1. 11.1 Transient Protection
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 サポート・リソース
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Layout Guidelines

  • For all the applications, TI recommends a 0.1 µF or higher value ceramic decoupling capacitor between IN terminal and GND.
  • The optimum placement of decoupling capacitor is closest to the IN and GND terminals of the device. Care must be taken to minimize the loop area formed by the bypass-capacitor connection, the IN terminal, and the GND terminal of the IC. See Figure 12-1 for a typical PCB layout example.
  • High current carrying power path connections must be as short as possible and must be sized to carry at least twice the full-load current.
  • RTN, which is the reference ground for the device must be a copper plane or island.
  • Locate all the TPS2662x family support components R(ILIM), C(dVdT), UVLO, OVP resistors close to their connection pin. Connect the other end of the component to the RTN with shortest trace length.
  • The trace routing for the RILIM component to the device must be as short as possible to reduce parasitic effects on the current limit and current monitoring accuracy. These traces must not have any coupling to switching signals on the board.
  • Protection devices such as TVS, snubbers, capacitors, or diodes must be placed physically close to the device they are intended to protect, and routed with short traces to reduce inductance. For example, TI recommends a protection Schottky diode to address negative transients due to switching of inductive loads, and it must be physically close to the OUT and GND pins.
  • Thermal considerations: when properly mounted, the PowerPAD package provides significantly greater cooling ability. To operate at rated power, the PowerPAD must be soldered directly to the board RTN plane directly under the device. Other planes, such as the bottom side of the circuit board can be used to increase heat sinking in higher current applications. Designs that do not need reverse input polarity protection can have RTN, GND and PowerPAD connected together. PowerPAD in these designs can be connected to the PCB ground plane.