JAJSLC2C march   2014  – march 2021 TPS3700-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Timing Diagram
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Inputs (INA+, INB–)
      2. 7.3.2 Outputs (OUTA, OUTB)
      3. 7.3.3 Window Voltage Detector
      4. 7.3.4 Immunity to Input Terminal Voltage Transients
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 VPULLUP to a Voltage Other Than VDD
      2. 8.1.2 Monitoring VDD
      3. 8.1.3 Monitoring a Voltage Other Than VDD
      4. 8.1.4 Monitoring Overvoltage and Undervoltage for Separate Rails
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Input Supply Capacitor
        2. 8.2.1.2 Input Capacitors
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Trademarks
    3. 11.3 静電気放電に関する注意事項
    4. 11.4 用語集
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

Over the operating temperature range of TJ = –40°C to 125°C, and 1.8 V < VDD < 18 V, unless otherwise noted.
Typical values are at TJ = 25°C and VDD = 5 V.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
VDDSupply voltage range1.818V
V(POR)Power-on reset voltage(1)VOLmax = 0.2 V, I(OUTA/B) = 15 µA0.8V
VIT+Positive-going input threshold voltageVDD = 1.8 V396400404mV
VDD = 18 V396400404mV
VIT–Negative-going input threshold voltageVDD = 1.8 V387394.5400mV
VDD = 18 V387394.5400mV
VhysHysteresis voltage (hys = VIT+ – VIT–)5.512mV
I(INA+)
I(INB–)		Input current (at the INA+ or INB– terminal)VDD = 1.8 V and 18 V, VI = 6.5 V–25125nA
VDD = 1.8 V and 18 V, VI = 0.1 V–15115nA
VOLLow-level output voltageVDD = 1.3 V, IO = 0.4 mA250mV
VDD = 1.8 V, IO = 3 mA250mV
VDD = 5 V, IO = 5 mA250mV
Ilkg(OD)Open-drain output leakage-currentVDD = 1.8 V and 18 V, VO = VDD300nA
VDD = 1.8 V, VO = 18 V300nA
IDDSupply currentVDD = 1.8 V, no load5.511µA
VDD = 5 V613µA
VDD = 12 V613µA
VDD = 18 V713µA
Startup delay(2)150

450

µs
UVLOUndervoltage lockout(4)VDD falling1.31.7V
(1) The lowest supply voltage (VDD) at which output is active; tr(VDD) > 15 µs/V. Below V(POR), the output cannot be determined.
(2) During power on, VDD must exceed 1.8 V for 450 µs (max) before the output is in a correct state.
(3) High-to-low and low-to-high refers to the transition at the input terminals (INA+ and INB–).
(4) When VDD falls below UVLO, OUTA is driven low and OUTB goes to high impedance. The outputs cannot be determined below V(POR).