JAJSLG9B March   2021  – November 2023 TPS3704-Q1

PRODUCTION DATA  

1.   1
2. 1 特長
3. 2 アプリケーション
4. 3 概要
5. 4 Device Nomenclature
6. 5 Pin Configuration and Functions
7. 6 Specifications
   1. 6.1 絶対最大定格
   2. 6.2 ESD 定格
   3. 6.3 推奨動作条件
   4. 6.4 Thermal Information
   5. 6.5 電気的特性
   6. 6.6 タイミング要件
   7. 6.7 Timing Diagrams
   8. 6.8 Typical Characteristics
8. 7 Detailed Description
   1. 7.1 Overview
   2. 7.2 Functional Block Diagrams
   3. 7.3 Feature Description
      1. 7.3.1 VDD
      2. 7.3.2 SENSEx Input
         1. 7.3.2.1 Immunity to SENSEx Pins Voltage Transients
            1. 7.3.2.1.1 SENSEx Hysteresis
      3. 7.3.3 RESETx/RESETx
   4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation (VDD > VDD(MIN))
      2. 7.4.2 Undervoltage Lockout (VPOR < VDD < UVLO)
      3. 7.4.3 Power-On Reset (VDD < VPOR)
9. 8 Application and Implementation
   1. 8.1 Application Information
      1. 8.1.1 Voltage Threshold Accuracy
      2. 8.1.2 Adjustable Voltage Thresholds
   2. 8.2 Typical Applications
      1. 8.2.1 Design 1: Multi-Rail Window Monitoring for Microcontroller Power Rails
         1. 8.2.1.1 Design Requirements
         2. 8.2.1.2 Detailed Design Procedure
      2. 8.2.2 Design 2: Manual Self-Test Option for Enhanced Functional Safety Use Cases
         1. 8.2.2.1 Design Requirements
         2. 8.2.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
   3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power Supply Guidelines
   4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
10. 9 Device and Documentation Support
    1. 9.1 Device Nomenclature
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
11. 10Revision History
12. 11Mechanical, Packaging, and Orderable Information