JAJSJT8C May 2020 – June 2021 TPS543620
When the device is enabled, but the high-side FET and low-side FET are disabled due to a fault condition, the output voltage discharge mode is enabled. This mode turns on the discharge FET from SW to PGND to discharge the output voltage. The discharge FET is turned off when the converter is ready to resume switching, either after the fault clears or after the wait time before hiccup is over.
The output voltage discharge mode is activated by any of below fault events:
High-side or low-side positive overcurrent
Output voltage undervoltage