JAJSIY9D March   2020  – October 2020 TPS63900

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Trapezoidal Current Control
      2. 7.3.2 Device Enable / Disable
      3. 7.3.3 Soft Start
      4. 7.3.4 Input Current Limit
      5. 7.3.5 Dynamic Voltage Scaling
      6. 7.3.6 Device Configuration (Resistor-to-Digital Interface)
      7. 7.3.7 SEL Pin
      8. 7.3.8 Short-Circuit Protection
        1. 7.3.8.1 Current Limit Setting = 'Unlimited'
        2. 7.3.8.2 Current Limit Setting = 1 mA to 100 mA
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design with WEBENCH Tools
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Input Capacitor Selection
        5. 8.2.2.5 Setting The Output Voltage
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 用語集
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Trapezoidal Current Control

Figure 7-1 shows a simplified block diagram of the power stage of the device. Inductor current is sensed in series with Q1 (the peak current) and Q4 (the valley current).

GUID-DBBF6DBB-70E0-4BDA-AACD-C001FC5A8FA7-low.gifFigure 7-1 Power Stage Simplified Block Diagram

The device uses a trapezoidal inductor current to regulate its output under all operating conditions. Thus, the device only has one operating mode and does not display any of the mode-change transients or unpredictable switching displayed by many other buck-boost devices.

There are four phases of operation:

  • Phase A – Q1 and Q3 are on and Q2 and Q4 are off
  • Phase B – Q1 and Q4 are on and Q2 and Q3 are off
  • Phase C – Q2 and Q4 are on and Q1 and Q3 are off
  • Phase D – Q2 and Q3 are on and Q1 and Q4 are off

Figure 7-2 shows the inductor current waveform when VI > VO, Figure 7-3 shows the current waveform when VI = VO, and Figure 7-4 shows the current waveform when VI < VO.

Figure 7-2 through Figure 7-4 show the typical waveforms during continuous conduction mode (CCM) switching for three operating conditions. During discontinuous conduction mode (DCM), the typical inductor current waveforms look similar to CCM with Phase D at 0 A inductor current. In deep boost mode, where VI << VO, Phase C length gradually decreases to zero until the switching waveform becomes triangular.

GUID-1933B6F1-D1D3-4D97-990F-5DB22D5FD01E-low.gifFigure 7-2 Inductor Current Waveform when VI > VO (CCM)
GUID-43696417-ABFF-48DD-8437-E22069F4260C-low.gifFigure 7-3 Inductor Current Waveform when VI = VO (CCM)
GUID-044E9F2E-3A35-416D-B740-54163034BED7-low.gifFigure 7-4 Inductor Current Waveform when VI < VO (CCM)

The ideal relationship between VI and VO (that is, assuming no losses) is

Equation 1. GUID-F9A9A5DA-4A3F-41E0-B8D6-A1E7A906E842-low.gif

where

  • VI is the input voltage
  • VO is the output voltage
  • tw(A) is the duration of phase A
  • tw(B) is the duration of phase B
  • tw(C) is the duration of phase C

By varying relative duration of each phase, the device can regulate VO to be less than, equal to, or greater than VI.