JAJSIY9D March   2020  – October 2020 TPS63900

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Trapezoidal Current Control
      2. 7.3.2 Device Enable / Disable
      3. 7.3.3 Soft Start
      4. 7.3.4 Input Current Limit
      5. 7.3.5 Dynamic Voltage Scaling
      6. 7.3.6 Device Configuration (Resistor-to-Digital Interface)
      7. 7.3.7 SEL Pin
      8. 7.3.8 Short-Circuit Protection
        1. 7.3.8.1 Current Limit Setting = 'Unlimited'
        2. 7.3.8.2 Current Limit Setting = 1 mA to 100 mA
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design with WEBENCH Tools
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Input Capacitor Selection
        5. 8.2.2.5 Setting The Output Voltage
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 用語集
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

Over operating junction temperature range and recommended supply voltage range (unless otherwise noted). Typical values are at VI = 3.0 V, VO = 2.5 V and TJ = 25°C (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
Quiescent current into VIN V(EN) = 3 V, no load, not switching, "unlimited" current setting 0.075  1 µA
Shutdown current into VIN V(EN) = 0 V 60 nA
VIT+(UVLO) Positive-going UVLO threshold voltage 1.73  1.75 1.77 V
Vhys(UVLO) UVLO threshold voltage hysteresis 90 100 110 mV
VIT+(POR) Positive-going POR threshold voltage  1.37 1.74 V
I/O SIGNALS
VIH High-level input voltage (EN, SEL) 1.2 V
VIL Low-level input voltage (EN, SEL) 0.4 V
Input current (EN, SEL) V(EN), V(SEL) = 1.8 V or 0 V.
TJ = 25°C		 ±1 ±10 nA
POWER SWITCH
rDS(on) On-state resistance Q1 VI = 3 V, VO = 5 V,   
test current = 1 A		 155 mΩ
Q2 VI = 3 V, VO = 3 V,  test current = 1 A 110
Q3 VI = 3 V, VO = 3 V, 
test current = 1 A		 110
Q4 VI = 5 V, VO = 3 V, 
test current = 1 A		 155
CURRENT LIMIT
Peak current limit during Startup (Q1) VI = 3.6 V,
unlimited current limit setting		 0.35
 0.83 A
Peak current limit (Q1)   VI = 1.8 V, VO = 3.6 V,
unlimited current limit setting
 1.33 1.45
 		 1.6
 A
VI = 3.6 V, VO = 3.3 V,
100-mA current limit setting		 0.15 0.29 
 		 0.51
Average input current limit TJ = –40°C to 85°C 1-mA setting 1 mA
2.5-mA setting 2.5
5-mA setting 5
10-mA settting 10
25-mA setting 25
50-mA setting 50
100-mA setting 100
OUTPUT
Output voltage DC accuracy IO = 1 mA, CO(eff) = 10 µF, L(eff) = 2.2 µH  ±1.5 %
CONTROL
Internal reference resistor 33 kΩ
RCFG R2D setting #0 0 0.1 kΩ
R2D setting #1 –3% 0.511 +3%
R2D setting #2 –3% 1.15 +3%
R2D setting #3 –3% 1.87 +3%
R2D setting #4 –3% 2.74 +3%
R2D setting #5 –3% 3.83 +3%
R2D setting #6 –3% 5.11 +3%
R2D setting #7 –3% 6.49 +3%
R2D setting #8 –3% 8.25 +3%
R2D setting #9 –3% 10.5 +3%
R2D setting #10 –3% 13.3 +3%
R2D setting #11 –3% 16.2 +3%
R2D setting #12 –3% 20.5 +3%
R2D setting #13 –3% 24.9 +3%
R2D setting #14 –3% 30.1 +3%
R2D setting #15 –3% 36.5 +3%
PROTECTION FEATURES
Thermal shutdown threshold temperature 140 150 160 °C
Thermal shutdown hysteresis 15 20 25 °C
TIMING PARAMETERS
td(POR) POR signal delay after reaching POR threshold 3.8 ms
td(EN) Delay between a rising edge on the EN pin and the start of the output voltage ramp Supply voltage stable before EN pin goes high 1.5 ms
tw(SS) Soft-start step duration VO > 1.8 V 100 125 150 µs
td(SEL) Delay between a change in the state of the SEL pin and the first step change in the output voltage 30 40 µs
tw(DVS) Dynamic voltage scaling step duration 100 125 150 µs
td(RESTART) Restart delay after protection 10 11 ms