SBVS190E March   2012  – December 2015 TPS7A7300


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configurations
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 User-Configurable Output Voltage
      2. 7.3.2 Traditional Adjustable Configuration
      3. 7.3.3 Undervoltage Lockout (UVLO)
      4. 7.3.4 Soft-Start
      5. 7.3.5 Current Limit
      6. 7.3.6 Enable
      7. 7.3.7 Power Good
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. ANY-OUT Programmable Output Voltage
        2. Traditional Adjustable Output Voltage
        3. Input Capacitor Requirements
        4. Output Capacitor Requirements
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
    4. 10.4 Power Dissipation
    5. 10.5 Estimating Junction Temperature
  11. 11Device And Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, And Orderable Information



8 Application and Implementation


Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The TPS7A7300 is a very-low dropout LDO with very fast load transient response. The TPS7A7300 provides a number of features such as a power good signal for output monitoring, a soft-start pin to reduce inrush currents during start-up, and it is suitable for applications that require up to 3 A of output current.

8.2 Typical Application

TPS7A7300 pg1_fbd_bvs190.gif Figure 31. 1.2-V Output Using ANY-OUT Pins

8.2.1 Design Requirements

Table 4 lists the design parameters for this example.

Table 4. Design Parameters

Input voltage range 1.425 V to 6.5 V
Output voltage 1.2 V
Output current rating 3 A
Output capacitor range 4.7 µF to 200 µF
feedforward capacitor range 220 pF to 100 nF
Soft-Start capacitor range 0 to 1 µF

8.2.2 Detailed Design Procedure ANY-OUT Programmable Output Voltage

For ANY-OUT operation, the TPS7A7001 does not use any external resistors to set the output voltage, but uses device pins labeled 50 mV, 100 mV, 200 mV, 400 mV, 800 mV, and 1.6 V to set the regulated output voltage. Each pin is either connected to ground (active) or is left open (floating). The ANY-OUT programming is set as the sum of the internal reference voltage (V(SS) = 0.5 V) plus the sum of the respective voltages assigned to each active pin. By leaving all ANY-OUT pins open, or floating, the output is set to the minimum possible output voltage equal to V(SS). By grounding all of the ANY-OUT pins, the output is set to 3.65 V.

When using the ANY-OUT pins, the SNS pin must always be connected between the OUT and FB pins. However, the feedforward capacitor must be connected to the FB pin, not the SNS pin. Traditional Adjustable Output Voltage

For applications that need the regulated output voltage to be greater than 3.65 V (or those that require more resolution than the 50 mV that the ANY-OUT pins provide), the TPS7A7300 can also be use the traditional adjustable method of setting the regulated output.

When using the traditional method of setting the output, the FB pin must be connected to the node connecting the top and bottom resistors of the resistor divider. The SNS pin must be left floating. Input Capacitor Requirements

As a result of its very fast transient response and low-dropout operation support, it is necessary to reduce the line impedance at the input pin of the TPS7A7300. The line impedance depends heavily on various factors, such as wire (PCB trace) resistance, wire inductance, and output impedance of the upstream voltage supply (power supply to the TPS7A7300). Therefore, a specific value for the input capacitance cannot be recommended until the previously listed factors are finalized.

In addition, simple usage of large input capacitance can form an unwanted LC resonance in combination with input wire inductance. For example, a 5-nH inductor and a 10-µF input capacitor form an LC filter that has a resonance at 712 kHz. This value of 712 kHz is well inside the bandwidth of the TPS7A7300 control loop.

The best guideline is to use a capacitor of up to 1 µF with well-designed wire connections (PCB layout) to the upstream supply. If it is difficult to optimize the input line, use a large tantalum capacitor in combination with a good-quality, low-ESR, 1-µF ceramic capacitor. Output Capacitor Requirements

The TPS7A7300 is designed to be stable with standard ceramic capacitors with capacitance values from 4.7 μF to 47 μF without a feedforward capacitor. For output capacitors from 47 µF to 200 µF a feedforward capacitor of at least 220 pF must be used. The TPS7A7300 is evaluated using an X5R-type, 10-μF ceramic capacitor. TI highly recommends the X5R- and X7R-type capacitors because they have minimal variation in value and ESR over temperature. Maximum ESR must be less than 1 Ω.

As with any regulator, increasing the size of the output capacitor reduces overshoot and undershoot magnitude, but increases duration of the transient response.

8.2.3 Application Curves

TPS7A7300 bvs136_g315.png
Figure 32. Load Transient Response (VOUT = 1.2 V)
TPS7A7300 bvs136_g300.png
Figure 34. Line Transient Response
TPS7A7300 bvs136_g302.png
Figure 36. Turnon Response (IN = EN)
TPS7A7300 bvs136_g304.png
Figure 38. EN Pulse On Response (Over Stable VIN)
TPS7A7300 bvs136_g306.png
Figure 40. Soft-Start Delay vs CSS (Enlarged View)
TPS7A7300 bvs136_g308.png
Figure 42. Soft-Start Delay vs CSS
TPS7A7300 bvs136_g318.png
Figure 33. Load Transient Response (VOUT = 3.3 V)
TPS7A7300 bvs136_g301.png
Figure 35. Power Up and Power Down (IN = EN)
TPS7A7300 bvs136_g303.png
Figure 37. Turnoff Response (IN = EN)
TPS7A7300 bvs136_g305.png
Figure 39. EN Pulse Off Response (Over Stable VIN)
TPS7A7300 bvs136_g307.png
Figure 41. Soft-Start Delay vs CSS (Reduced View)