9.2.2.1 Output Capacitor Selection C_EXT

Because of the pulsating output current nature of the boost converter, a low ESR output capacitor is required to maintain control loop stability, to enhance the converter's transient response and to reduce the output voltage ripple. For the output capacitor, it is recommended to use small ceramic capacitors placed as close as possible to the VOUT and GND pins of the IC. The minimum capacitance is 2μF.

To get an estimate of the steady ripple due to charging and discharging the output capacitance, Equation 2 can be used.

Equation 2.

Where f is the switching frequency which is 4MHz (typically.) and C is the effective output capacitance. Notice the TPS81256 device already incorporates ca. 1.2μF effective output capacitance.

In practice, the total ripple is larger due to the ESR of the output capacitor. This additional component of the ripple can be calculated using Equation 3:

Equation 3.

An MLCC capacitor with twice the value of the calculated minimum should be used due to DC bias effects. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance over temperature, become resistive at high frequencies. There are no additional requirements regarding minimum ESR. Larger capacitors cause lower output voltage ripple as well as lower output voltage drop during load transients but the total output capacitance value should not exceed ca. 30µF.

DC bias effect: high cap. ceramic capacitors exhibit DC bias effects, which have a strong influence on the device's effective capacitance. Therefore the right capacitor value has to be chosen very carefully. Package size and voltage rating in combination with material are responsible for differences between the rated capacitor value and it's effective capacitance. For instance, a 4.7µF X5R 16V 0603 MLCC capacitor would typically show an effective capacitance of less than 2.5µF (under 5V bias condition, high temperature and ageing effects).

Because the damping factor in the output path is directly related to several resistive parameters (e.g. inductor DCR, power-stage r_DS(on), PWB DC resistance, load switches r_DS(on) …) that are temperature dependant, the converter small and large signal behavior must be checked over the input voltage range, load current range and temperature range.

The easiest sanity test is to evaluate, directly at the converter’s output, the following aspects:

• PFM/PWM efficiency
• PFM/PWM and PWM load transient response

During the recovery time from a load transient, the output voltage can be monitored for settling time, overshoot or ringing that helps judge the converter’s stability. Without any ringing, the loop has usually more than 45° of phase margin.