JAJSD93 June   2017 TPS82150

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 改訂履歴
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommend Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM and PSM Operation
      2. 7.3.2 Low Dropout Operation (100% Duty Cycle)
      3. 7.3.3 Switch Current Limit
      4. 7.3.4 Undervoltage Lockout
      5. 7.3.5 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable and Disable (EN)
      2. 7.4.2 Soft Startup (SS/TR)
      3. 7.4.3 Voltage Tracking (SS/TR)
      4. 7.4.4 Power Good Output (PG)
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 1.8-V Output Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design with WEBENCH® Tools
          2. 8.2.1.2.2 Setting the Output Voltage
          3. 8.2.1.2.3 Input and Output Capacitor Selection
          4. 8.2.1.2.4 Soft Startup Capacitor Selection
        3. 8.2.1.3 Application Performance Curves
    3. 8.3 System Examples
      1. 8.3.1 Inverting Power Supply
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Consideration
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 開発サポート
        1. 11.1.2.1 WEBENCH®ツールによるカスタム設計
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
  • SIL|8
サーマルパッド・メカニカル・データ
発注情報

Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

Application Information

The output voltage of the TPS82150 is adjusted by component selection. The following section discusses the design of the external components to complete the power supply design for several input and output voltage options by using typical applications as a reference.

Typical Applications

1.8-V Output Application

space

TPS82150 TPS82150_1.8V_typ_app.gif Figure 5. 1.8-V Output Application

space

Design Requirements

For this design example, use the following as the input parameters.

Table 2. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE
Input voltage range 12V
Output voltage 1.8V
Output ripple voltage < 20mV
Output current rating 1A

The components used for measurements are given in the following table.

Table 3. List of Components

REFERENCE DESCRIPTION(1) MANUFACTURER
C1 10 µF, 25 V, X7R, ±20%, size 1206, C3216X7R1E106M160AE TDK
C2 22 µF, 10 V, X7S, ±20%, size 0805, C2012X7S1A226M125AC TDK
C3 3300 pF, 50 V, ±5%, C0G/NP0, size 0603, GRM1885C1H332JA01D Murata
R1, R2, R3 Standard

Detailed Design Procedure

Custom Design with WEBENCH® Tools

Click here to create a custom design using the TPS82150 device with the WEBENCH® Power Designer.

  1. Start by entering your VIN, VOUT, and IOUT requirements.
  2. Optimize your design for key parameters like efficiency, footprint and cost using the optimizer dial and compare this design with other possible solutions from Texas Instruments.
  3. The WEBENCH Power Designer provides you with a customized schematic along with a list of materials with real time pricing and component availability.
  4. In most cases, you will also be able to:
    • Run electrical simulations to see important waveforms and circuit performance
    • Run thermal simulations to understand the thermal performance of your board
    • Export your customized schematic and layout into popular CAD formats
    • Print PDF reports for the design, and share your design with colleagues
  5. Get more information about WEBENCH tools at www.ti.com/WEBENCH.

Setting the Output Voltage

The output voltage is set by an external resistor divider according to the following equations:

space

Equation 6. TPS82150 EQ2_vout_lvsaw2.gif

space

R2 should not be higher than 100kΩ to achieve high efficiency at light load while providing acceptable noise sensitivity. Larger currents through R2 improve noise sensitivity and output voltage accuracy. Figure 5 shows the external resistor divider value for a 1.8-V output. Choose appropriate resistor values for other outputs.

In case the FB pin gets opened, the device clamps the output voltage at the VOUT pin internally to about 7V.

Input and Output Capacitor Selection

For best output and input voltage filtering, low ESR ceramic capacitors are required. The input capacitor minimizes input voltage ripple, suppresses input voltage spikes and provides a stable system rail for the device. A 10-µF or larger input capacitor is required. The output capacitor value can range from 22μF up to more than 400μF. Higher values are possible as well and can be evaluated through the transient response. Larger soft start times are recommended for higher output capacitances.

High capacitance ceramic capacitors have a DC Bias effect, which will have a strong influence on the final effective capacitance. Therefore the right capacitor value has to be chosen carefully. Package size and voltage rating in combination with dielectric material are responsible for differences between the rated capacitor value and the effective capacitance.

Soft Startup Capacitor Selection

A capacitance connected between the SS/TR pin and the GND allows programming the startup slope of the output voltage. A constant current of 2.5 μA charges the external capacitor. The capacitance required for a given soft startup time for the output voltage is given by:

space

Equation 7. TPS82150 TPS82130_EQ_ss.gif

Application Performance Curves

TA = 25°C, VIN = 12 V, VOUT = 1.8 V, unless otherwise noted.

TPS82150 D001_SLVSDN4.gif
Figure 6. Efficiency, VOUT = 1.0 V
TPS82150 D002_SLVSDN4.gif
Figure 8. Efficiency, VOUT = 1.8 V
TPS82150 D003_SLVSDN4.gif
Figure 10. Efficiency, VOUT = 2.5 V
TPS82150 D004_SLVSDN4.gif
Figure 12. Efficiency, VOUT = 3.3 V
TPS82150 D023_SLVSDN4.gif
Figure 14. Efficiency, VOUT = 5.0 V
TPS82150 SLVSDN4_thermal_1.0V.gif
θJA = 46.1 °C/W
Figure 16. Thermal Derating, VOUT = 1 V
TPS82150 SLVSDN4_thermal_3.3V.gif
θJA = 46.1 °C/W
Figure 18. Thermal Derating, VOUT = 3.3 V
TPS82150 D005_SLVSDN4.gif
Figure 20. Load Regulation
TPS82150 D009_SLVSDN4.gif
VOUT = 1.8V
Figure 22. Switching Frequency
TPS82150 SLVSDN4_PWMripple.gif
IOUT = 1A
Figure 24. Input and Output Ripple in PWM Mode
TPS82150 SLVSDN4_loadtran_0to1A.gif
IOUT = 0A to 1A, 1A/µs
Figure 26. Load Transient
TPS82150 SLVSDN4_startup_noload.gif
No Load
Figure 28. Startup without Load
TPS82150 D019_SLVSDN4.gif
Figure 7. Efficiency, VOUT = 1.0 V
TPS82150 D020_SLVSDN4.gif
Figure 9. Efficiency, VOUT = 1.8 V
TPS82150 D021_SLVSDN4.gif
Figure 11. Efficiency, VOUT = 2.5 V
TPS82150 D022_SLVSDN4.gif
Figure 13. Efficiency, VOUT = 3.3 V
TPS82150 D024_SLVSDN4.gif
Figure 15. Efficiency, VOUT = 5.0 V
TPS82150 SLVSDN4_thermal_1.8V.gif
θJA = 46.1 °C/W
Figure 17. Thermal Derating, VOUT = 1.8 V
TPS82150 SLVSDN4_thermal_5.0V.gif
θJA = 46.1 °C/W
Figure 19. Thermal Derating, VOUT = 5 V
TPS82150 D006_SLVSCY5_TPS82130.gif
IOUT = 1A
Figure 21. Line Regulation
TPS82150 D018_SLVSCY5_TPS82130.gif
IOUT = 1A
Figure 23. Switching Frequency
TPS82150 SLVSDN4_PSMripple.gif
No Load
Figure 25. Input and Output Ripple in PSM Mode
TPS82150 SLVSDN4_loadtran_05to1A.gif
IOUT = 0.5A to 1A, 1A/µs
Figure 27. Load Transient
TPS82150 SLVSDN4_startup_1.8Ohm.gif
ROUT = 1.8Ω
Figure 29. Startup / Shutdown with Resistance Load

System Examples

Inverting Power Supply

The TPS82150 can be used as inverting power supply by rearranging external circuitry as shown in Figure 30. As the former GND node now represents a voltage level below system ground, the voltage difference between VIN and VOUT has to be limited for operation to the maximum supply voltage of 17V (see Equation 8).

space

Equation 8. TPS82150 SLVSDN4_eqinv.gif

space

space

TPS82150 SLVSDN4_inverter.gif Figure 30. Inverting Power Supply Schematic

space

The transfer function of the inverting power supply configuration differs from the buck mode transfer function, incorporating a Right Half Plane Zero additionally. Therefore the loop stability has to be adapted. More detailed information is given in TIDUCV2.