JAJSMY4 September   2021

1. 特長
2. アプリケーション
3. 概要
4. Revision History
5. Pin Configuration and Functions
6. Specifications
7. Detailed Description
8. Application and Implementation
1. 8.1 Application Information
2. 8.2 Typical Application
1. 8.2.1 Design Requirements
2. 8.2.2 Detailed Design Procedure
3. 8.3 System Examples
9. Power Supply Recommendations
10. 10Layout
11. 11Device and Documentation Support
12. 12Mechanical, Packaging, and Orderable Information

• DWN|36

#### 8.2.2.2 Capacitor Selection

Table 8-1 Calculated Capacitor Values
CAPACITORVALUE (µF)NOTES
CIN2.2Place a 0.1-μF high-frequency decoupling capacitor in parallel close to pins
COUT12.2Add a 2.2-μF and a 0.1-μF capacitor for high-frequency decoupling of (VDD – VEE). Place close to pins.
COUT210Required for bulk charge for gate drive, voltage divider, and balance
COUT340
Equation 3. $\frac{{C}_{OUT2}{C}_{OUT3}}{{C}_{OUT2}{+C}_{OUT3}}\ge \frac{{Q}_{gtot}}{{V}_{P{P}_{MAX}}}=\frac{4.4\mu C}{0.5V}=8.8\mu F$
Equation 4. ${C}_{OUT3}={C}_{OUT2}\frac{VDD-COM}{COM-VEE}$
Equation 5. ${V}_{P{P}_{MAX}}={Q}_{gtot}\frac{{C}_{OUT2}{+C}_{OUT3}}{{C}_{OUT2}{C}_{OUT3}}=\frac{4.4\mu C}{8\mu F}=0.55V$