JAJSCB0E June   2016  – December 2021 UCC21520

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. 概要 (続き)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety-Limiting Values
    9. 7.9  Electrical Characteristics
    10. 7.10 Switching Characteristics
    11. 7.11 Insulation Characteristics Curves
    12. 7.12 Typical Characteristics
  8. Parameter Measurement Information
    1. 8.1 Propagation Delay and Pulse Width Distortion
    2. 8.2 Rising and Falling Time
    3. 8.3 Input and Disable Response Time
    4. 8.4 Programable Dead Time
    5. 8.5 Power-up UVLO Delay to OUTPUT
    6. 8.6 CMTI Testing
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 VDD, VCCI, and Undervoltage Lock Out (UVLO)
      2. 9.3.2 Input and Output Logic Table
      3. 9.3.3 Input Stage
      4. 9.3.4 Output Stage
      5. 9.3.5 Diode Structure in the UCC21520 and the UCC21520A
    4. 9.4 Device Functional Modes
      1. 9.4.1 Disable Pin
      2. 9.4.2 Programmable Dead-Time (DT) Pin
        1. 9.4.2.1 Tying the DT Pin to VCC
        2. 9.4.2.2 DT Pin Connected to a Programming Resistor between DT and GND Pins
        3. 9.4.2.3 41
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Designing INA/INB Input Filter
        2. 10.2.2.2 Select External Bootstrap Diode and its Series Resistor
        3. 10.2.2.3 Gate Driver Output Resistor
        4. 10.2.2.4 Gate to Source Resistor Selection
        5. 10.2.2.5 Estimate Gate Driver Power Loss
        6. 10.2.2.6 Estimating Junction Temperature
        7. 10.2.2.7 Selecting VCCI, VDDA/B Capacitor
          1. 10.2.2.7.1 Selecting a VCCI Capacitor
          2. 10.2.2.7.2 Selecting a VDDA (Bootstrap) Capacitor
          3. 10.2.2.7.3 Select a VDDB Capacitor
        8. 10.2.2.8 Dead Time Setting Guidelines
        9. 10.2.2.9 Application Circuits with Output Stage Negative Bias
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Certifications
    4. 13.4 Receiving Notification of Documentation Updates
    5. 13.5 サポート・リソース
    6. 13.6 Trademarks
    7. 13.7 Electrostatic Discharge Caution
    8. 13.8 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Typical Characteristics

VDDA = VDDB= 12 V, VCCI = 3.3 V, TA = 25°C, No load unless otherwise noted.

GUID-7EB1668B-2900-4653-AE43-CE51C1FD0002-low.gifFigure 7-4 Per Channel Current Consumption vs Frequency (No Load, VDD = 12 V or 25 V)
GUID-707C6271-E5A7-4CAD-87B9-58CADD49CA8B-low.gifFigure 7-6 Per Channel Current Consumption (IVDDA/B) vs Frequency (10-nF Load, VDD = 12 V or 25 V)
GUID-3CA99BF4-A386-48FF-B641-CBCE792188EF-low.gifFigure 7-8 Per Channel (IVDDA/B) Quiescent Supply Current vs Temperature (No Load, Input Low, No Switching)
GUID-5AB3A7AE-C432-4139-8B0C-29F86A385FCD-low.gifFigure 7-10 Rising and Falling Times vs Load (VDD = 12 V)
GUID-CD90CB71-91B4-46B1-B657-3F8E65F52EB8-low.gifFigure 7-12 Propagation Delay vs Temperature
GUID-A853C500-8421-4072-905D-24732854F47F-low.gifFigure 7-14 Pulse Width Distortion vs Temperature
GUID-0B87720F-8A64-40FC-AFC9-D203DA631198-low.gifFigure 7-16 Propagation Delay Matching (tDM) vs Temperature
GUID-81C3D244-7143-4A58-9A85-68AB4F7E184F-low.gifFigure 7-18 VDD 5-V UVLO Threshold vs Temperature
GUID-9F2AC1E7-D2DB-48B6-BBBE-605DD3FF85E8-low.gifFigure 7-20 VDD 8-V UVLO Threshold vs Temperature
GUID-665D0494-BB4C-492D-863B-CDEF64FFC04C-low.gifFigure 7-22 IN/DIS Low Threshold
GUID-8CBF6142-44F1-4E82-9F0F-3057AA63C3EE-low.gifFigure 7-24 Dead Time vs Temperature (with RDT = 20 kΩ and 100 kΩ)
GUID-2AA51C59-083E-474A-A495-A0671403EF5A-low.gifFigure 7-26 Typical Output Waveforms
GUID-693E9ECB-F4C4-4ED7-8501-51FB53CB3628-low.gifFigure 7-5 Per Channel Current Consumption (IVDDA/B) vs Frequency (1-nF Load, VDD = 12 V or 25 V)
GUID-6D27E1DF-7201-48B9-AD96-7C68BC255E4A-low.gifFigure 7-7 Per Channel (IVDDA/B) Supply Current Vs. Temperature (No Load, Different Switching Frequencies)
GUID-3B962825-9B0F-4022-8F5C-DF92F350768A-low.gifFigure 7-9 IVCCI Quiescent Supply Current vs Temperature (No Load, Input Low, No Switching)
GUID-0D432C31-B541-4311-A2AF-73A5D666E38C-low.gifFigure 7-11 Output Resistance vs Temperature
GUID-107B703F-74EB-4D6A-A4A1-5342AC00C225-low.gifFigure 7-13 Propagation Delay vs VCCI
GUID-06E215B2-8158-469E-B7AF-BF1B829565AF-low.gifFigure 7-15 Propagation Delay Matching (tDM) vs VDD
GUID-E5F99605-5310-4AFB-B11A-1A4FD6DF5D5F-low.gifFigure 7-17 VDD 5-V UVLO Hysteresis vs Temperature
GUID-DA83523C-A178-46DC-9C75-C50C0E1C5545-low.gifFigure 7-19 VDD 8-V UVLO Hysteresis vs Temperature
GUID-51FB669A-9DA6-4680-9354-13FCD6269A63-low.gifFigure 7-21 IN/DIS Hysteresis vs Temperature
GUID-88A87A1A-CC15-4AE6-99B5-164F6EECF52F-low.gifFigure 7-23 IN/DIS High Threshold
GUID-8F93F44E-F172-499E-9BB6-DDEDBE5C9C24-low.gifFigure 7-25 Dead Time Matching vs Temperature (with RDT = 20 kΩ and 100 kΩ)