JAJSFV5C July   2018  – March 2022 UCC24624

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. 概要 (続き)
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Management
      2. 8.3.2 Synchronous Rectifier Control
      3. 8.3.3 Turn-off Threshold Adjustment
      4. 8.3.4 Noise Immunity
        1. 8.3.4.1 On-Time Blanking
        2. 8.3.4.2 Off-Time Blanking
        3. 8.3.4.3 Two-Channel Interlock
        4. 8.3.4.4 SR Turn-on Re-arm
        5. 8.3.4.5 Adaptive Turn-on Delay
      5. 8.3.5 Gate Voltage Clamping
      6. 8.3.6 Standby Mode
    4. 8.4 Device Functional Modes
      1. 8.4.1 UVLO Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Run Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 MOSFET Selection
        2. 9.2.2.2 Snubber Design
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 Custom Design With WEBENCH® Tools
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Overview

The UCC24624 is a high performance synchronous rectifier (SR) controller for LLC resonant converter applications. It integrates two channels of SR control into a single 8-pin SOIC package, minimizes the external components, and simplifies PCB layout. The UCC24624 synchronous rectifier controller uses drain-to-source voltage (VDS) sensing to determine the SR MOSFET conduction interval. The SR MOSFET is turned on when its VDS falls below –265-mV turn-on threshold, and is turned off when VDS rises above the turn-off threshold (the turn-off threshold is user programmable at 10.5 mV or greater). The SR conduction voltage drop is continuously monitored and regulated to minimize the conduction loss and body diode conduction time. The extremely fast turn-off comparator and driving circuit allows the fast turn off of SR MOSFETs, even when the LLC converter operates above its resonant frequency. Fixed 475-ns minimum on-time blanking allows the controller to support the SR operating at up to 625-kHz switching frequency. The 650-ns minimum off-time blanking makes the IC more robust against the noise caused by the parasitic ringing. The two channels have interlock logic to prevent shoot-through between the two SR MOSFETs. To minimize standby power, automatic standby mode disables the gate pulses when the average switching frequency of the converter becomes lower than 9 kHz. When the load increases such that the average switching frequency on channel 1 rises above 15.6 kHz, the controller resumes normal SR operation. In standby mode, two channels are turned off and the gate-drive outputs are actively held low. Other functionality are disabled during standby mode to minimize the IC current consumption. The wide VDD range and gate driver clamp make the controller applicable for different output voltage applications. With an internal voltage clamp on the VDD pin, the UCC24624 can be directly powered by an output voltage higher than 24.75 V with a series resistor between VDD and the LLC converter output.