JAJSJ98B June   2020  – April 2022 UCC27288

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 説明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Start-up and UVLO
      2. 7.3.2 Input Stages
      3. 7.3.3 Level Shifter
      4. 7.3.4 Output Stage
      5. 7.3.5 Negative Voltage Transients
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Select Bootstrap and VDD Capacitor
        2. 8.2.2.2 External Bootstrap Diode and Series Resistor
        3. 8.2.2.3 Estimate Driver Power Losses
        4. 8.2.2.4 Selecting External Gate Resistor
        5. 8.2.2.5 Delays and Pulse Width
        6. 8.2.2.6 VDD and Input Filter
        7. 8.2.2.7 Transient Protection
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 サポート・リソース
    3. 11.3 Trademarks
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 用語集
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Power Supply Recommendations

The recommended bias supply voltage range for UCC27288 is from 8 V to 16 V. The lower end of this range is governed by the internal under voltage-lockout (UVLO) protection feature, 7.0 V typical, of the VDD supply circuit block. The upper end of this range is driven by the 16-V recomended maximum voltage rating of the VVDD. It is recommended that voltage on VDD pin should be lower than maximum recommended voltage.

The UVLO protection feature also involves a hysteresis function. This means that once the device is operating in normal mode, if the VDD voltage drops, the device continues to operate in normal mode as far as the voltage drop do not exceeds the hysteresis specification, VDDHYS. If the voltage drop is more than hysteresis specification, the device shuts down. Therefore, while operating at or near the 8-V range, the voltage ripple on the auxiliary power supply output should be smaller than the hysteresis specification of UCC27288 to avoid triggering device shutdown.

A local bypass capacitor should be placed between the VDD and GND pins. This capacitor should be located as close to the device as possible. A low ESR, ceramic surface mount capacitor is recommended. It is recommended to use two capacitors across VDD and GND: a low capacitance ceramic surface-mount capacitor for high frequency filtering placed very close to VDD and GND pin, and another high capacitance value surface-mount capacitor for device bias requirements. In a similar manner, the current pulses delivered by the HO pin are sourced from the HB pin. Therefore, two capacitors across the HB to HS are recommended. One low value small size capacitor for high frequency filtering and another one high capacitance value capacitor to deliver HO pulses.

In applications where noise is very dominant and there is space on the PWB (Printed Wiring Board), it is recommended to place a small RC filter at the inputs. This allows for improving the overall performance of the design. In such applications. it is also recommended to have a place holder for power MOSFET external gate resistor. This resistor allows the control of not only the drive capability but also the slew rate on HS, which impacts the performance of the high-side circuit. If diode is used across the external gate resistor, it is recommended to use a resistor in series with the diode, which provides further control of fall time.

In power supply applications such as motor drives, there exist lot of transients through-out the system. This sometime causes over voltage and under voltage spikes on almost all pins of the gate driver device. To increase the robustness of the design, it is recommended that the clamp diode should be used on HO and LO pins. If user does not wish to use power MOSFET parasitic diode, external clamp diode on HS pin is recommended, which needs to be high voltage high current type (same rating as MOSFET) and very fast acting. The leakage of these diodes across the temperature needs to be minimal.

In power supply applications where it is almost certain that there is excessive negative HS voltage, it is recommended to place a small resistor between the HS pin and the switch node. This resistance helps limit current into the driver device up to some extent. This resistor will impact the high side drive capability and therefore needs to be considered carefully.