JAJSGT5J NOVEMBER   2006  – January 2019 TS3USB221

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      ブロック図
      2.      概略回路図、各 FET スイッチ (SW)
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Dynamic Electrical Characteristics, VCC = 3.3 V ± 10%
    7. 6.7  Dynamic Electrical Characteristics, VCC = 2.5 V ± 10%
    8. 6.8  Switching Characteristics, VCC = 3.3 V ± 10%
    9. 6.9  Switching Characteristics, VCC = 2.5 V ± 10%
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Low Power Mode
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

6.9 Switching Characteristics, VCC = 2.5 V ± 10%

over operating range, TA = –40°C to 85°C, VCC = 2.5 V ± 10%, GND = 0 V
PARAMETER MIN TYP(1) MAX UNIT
tpd Propagation delay(2)(3) 0.25 ns
tON Line enable time S to D, nD 50 ns
OE to D, nD 32
tOFF Line disable time S to D, nD 23 ns
OE to D, nD 12
tSK(O) Output skew between center port to any other port(2) 0.1 0.2 ns
tSK(P) Skew between opposite transitions of the same output (tPHL  – tPLH)(2) 0.1 0.2 ns
(1) For Maximum or Minimum conditions, use the appropriate value specified under Electrical Characteristics for the applicable device type.
(2) Specified by design
(3) The bus switch contributes no propagational delay other than the RC delay of the on resistance of the switch and the load capacitance. The time constant for the switch alone is of the order of 0.25 ns for 10-pF load. The time constraint adds very little propagational delay to the system because it is much smaller than the rise and fall times of typical driving signals. Propagational delay of the bus switch, when used in a system, is determined by the driving circuit on the driving side of the switch and its interactions with the load on the driven side.