JAJSIJ6F April   2011  – February 2020 AMC1204

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      デバイスのブロック図
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics
    10. 7.10 Timing Requirements
    11. 7.11 Insulation Characteristics Curves
    12. 7.12 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Input
      2. 8.3.2 Modulator
      3. 8.3.3 Digital Output
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Digital Filter Usage
    2. 9.2 Typical Application
      1. 9.2.1 Frequency Inverter Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Example of a Resolver-Based Motor Control Analog Front End
      3. 9.2.3 Isolated Voltage Sensing
        1. 9.2.3.1 Design Requirements
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 サポート・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

8.3.1 Analog Input

The differential analog input of the AMC1204 and AMC1204B is implemented with a switched-capacitor circuit.

The AMC1204 and AMC1204B measure the differential input signal VIN = (VINP – VINN) against the internal reference of 2.5 V using internal capacitors that are continuously charged and discharged. Figure 44 shows the simplified schematic of the AMC1204 and AMC1204B input circuitry; the right side of Figure 44 illustrates the input circuitry with the capacitors and switches replaced by an equivalent circuit.

In Figure 44, the S1 switches close during the input sampling phase. With the S1 switches closed, CDIFF charges to the voltage difference across VINP and VINN. For the discharge phase, both S1 switches open first and then both S2 switches close. CDIFF discharges approximately to AGND + 0.8 V during this phase. This two-phase sample/discharge cycle repeats with a period of tCLKIN = 1/fCLKIN. fCLKIN is the operating frequency of the modulator. The capacitors CIP and CIN are of parasitic nature and caused by bonding wires and the internal ESD protection structure.

AMC1204 ai_equiv_ana_cir_bas512.gifFigure 44. Equivalent Analog Input Circuit

There are two restrictions on the analog input signals VINP and VINN. First, if the input voltage exceeds the range AGND – 0.5 V to AVDD + 0.3 V, the input current must be limited to 10 mA because the input protection diodes on the front end of the converter begin to turn on. In addition, the linearity and the noise performance of the device are ensured only when the differential analog input voltage remains within ±250 mV.