SBAA535A March   2022  – March 2024 ADC128D818 , ADS1000 , ADS1000-Q1 , ADS1013 , ADS1013-Q1 , ADS1014 , ADS1014-Q1 , ADS1015 , ADS1015-Q1 , ADS1018 , ADS1018-Q1 , ADS1100 , ADS1110 , ADS1112 , ADS1113 , ADS1113-Q1 , ADS1114 , ADS1114-Q1 , ADS1115 , ADS1115-Q1 , ADS1118 , ADS1118-Q1 , ADS1119 , ADS1120 , ADS1120-Q1 , ADS112C04 , ADS112U04 , ADS1130 , ADS1131 , ADS1146 , ADS1147 , ADS1148 , ADS1148-Q1 , ADS114S06 , ADS114S06B , ADS114S08 , ADS114S08B , ADS1158 , ADS1216 , ADS1217 , ADS1218 , ADS1219 , ADS1220 , ADS122C04 , ADS122U04 , ADS1230 , ADS1231 , ADS1232 , ADS1234 , ADS1235 , ADS1235-Q1 , ADS1243-HT , ADS1246 , ADS1247 , ADS1248 , ADS124S06 , ADS124S08 , ADS1250 , ADS1251 , ADS1252 , ADS1253 , ADS1254 , ADS1255 , ADS1256 , ADS1257 , ADS1258 , ADS1258-EP , ADS1259 , ADS1259-Q1 , ADS125H01 , ADS125H02 , ADS1260 , ADS1260-Q1 , ADS1261 , ADS1261-Q1 , ADS1262 , ADS1263 , ADS127L01 , ADS1281 , ADS1282 , ADS1282-SP , ADS1283 , ADS1284 , ADS1287 , ADS1291 , LMP90080-Q1 , LMP90100 , TLA2021 , TLA2022 , TLA2024

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Data Sheet Timing and Nomenclature
  6. 3 What Causes Conversion Latency in a Delta-Sigma ADC?
  7. 4 Digital Filter Operation and Behavior
    1.     8
    2.     9
    3. 4.1 Unsettled Data Due to an ADC Operation
  8. 5 ADC Features and Modes that Affect Conversion Latency
    1. 5.1 First Conversion Versus Second and Subsequent Conversion Latency
    2. 5.2 Conversion Mode
    3. 5.3 Programmable Delay
    4. 5.4 ADC Overhead Time
    5. 5.5 Clock Frequency
    6. 5.6 Chopping
  9. 6 Analog Settling
  10. 7 Important Takeaways
  11. 8 Cycle Time Calculation Examples
    1. 8.1 Example #1: Using the ADS124S08
    2. 8.2 Example #2: Changing the Conversion Mode
    3. 8.3 Example #3: Changing the Filter Type
    4. 8.4 Example #4: Changing the Clock Frequency
    5. 8.5 Example #5: Enabling Chop and Reducing the Number of Conversions per Channel
    6. 8.6 Example #6: Scanning Two Channels With Different System Parameters
    7. 8.7 Example #7: Using the ADS1261
    8. 8.8 Example #8: Changing Multiple Parameters Using the ADS1261
  12. 9 Summary
  13. 10Revision History

5.3 Programmable Delay

Some ADCs include a programmable delay time to accommodate external settling requirements. Table 5-3 shows the ADS124S08 available programmable delay time options in terms of one modulator period, tMOD.

Table 5-3 Programmable Delay Selection in the ADS124S08 Gain Setting (PGA) Register
BITFIELDTYPERESETDESCRIPTION
7:5DELAY[2:0]R/W0hProgrammable conversion delay selection

Sets the programmable conversion delay time for the first conversion after a WREG when a configuration change resets the digital filter and triggers a new conversion.

000 : 14 ∙ tMOD (default)

001 : 25 ∙ tMOD

010 : 64 ∙ tMOD

011 : 256 ∙ tMOD

100 : 1024 ∙ tMOD

101 : 2048 ∙ tMOD

110 : 4096 ∙ tMOD

111 : 1 ∙ tMOD

The delay shown in Table 5-3 can be used for several reasons, including waiting for an external analog RC filter to settle to a final value, accommodating the PGA start-up time, or ensuring that an integrated voltage reference or current source (IDAC) is stable before starting the conversion process.

Programmable delay time was included in Figure 4-7 and Figure 5-2, though not explicitly mentioned. Figure 5-3 shows a complete diagram for the ADS124S08 low-latency and sinc3 filter behavior in single-shot conversion mode. The programmable delay time corresponds to the yellow boxes, as per the legend in the top right.

GUID-20220201-SS0I-9PQF-8SCC-M60P8QLVTF3X-low.svgFigure 5-3 Programmable Delay Using the ADS124S08 Low-Latency and Sinc3 Filters in Single-Shot Conversion Mode

As Figure 5-3 shows, the programmable delay occurs immediately after a conversion start is triggered. Therefore, this time period only needs to be considered when calculating first conversion latency. However, the programmable delay time is not always included in the overall conversion latency table values. Table note #3 for the ADS124S08 conversion latency table specifically states that the conversion latency values do not include the default programmable delay time of 14 ∙ tMOD seconds. Comparatively, the table note for the ADS1261 conversion latency table states that the conversion latency values do include the default 50-µs programmable delay time. Refer to the specific ADC data sheet to determine if that device has a programmable delay feature as well as how that time affects the overall conversion latency.