SBAA576A may   2023  – june 2023 ADS54J60

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Interleaving Architecture
  6. 3DC Offset Correction
    1. 3.1 DC Offset Correction Architecture
      1. 3.1.1 Default Configuration
      2. 3.1.2 Bypassing the DC Offset Correction
    2. 3.2 Freezing the DC Offset Correction
    3. 3.3 Effect of Environmental Temperature Fluctuations
    4. 3.4 Effect of Input Frequency on Interleaving Spur
  7. 4External Offset Correction
  8. 5Configuring External DC Offset Correction (Channel A)
    1. 5.1 Device Default Configuration
    2. 5.2 Baseline HSDC Pro Capture
    3. 5.3 Freezing the Interleaving Engine and DC Offset Values
    4. 5.4 Reading the Frozen DC Offset Values
    5. 5.5 Loading the DC Offset Values
    6. 5.6 Confirm HSDC Pro Capture
  9. 6Summary
  10. 7References
  11. 8Revision History

3.4 Effect of Input Frequency on Interleaving Spur

Note that the interleaving spur is frequency dependent. In general, the spurs increase in amplitude as the input frequency is increased. The example provided in Section 5 was performed with no input tone.

GUID-20230428-SS0I-GKNJ-SL74-2DW4FFSKNQRC-low.gif Figure 3-3 Interleaving Spur vs. Input Frequency