SBAU392A July   2022  – January 2023 AFE7950 , TRF1208

 

  1.   TRF1208-AFE7950-EVM Evaluation Module User's Guide
  2.   Trademarks
  3. 1EVM Overview
    1. 1.1 Hardware
      1. 1.1.1 Recommended Test Environment
      2. 1.1.2 Required Hardware
    2. 1.2 Required Software
      1. 1.2.1 Software Installation Sequence
      2. 1.2.2 Software Installation Checks
    3. 1.3 Signal Chain of the EVM Board
  4. 2Hardware Setup (TSW14J56 Used as an Example)
    1. 2.1 Power Supply Setup
    2. 2.2 TRF1208-AFE7950-EVM and TSW14J56 EVM Connections
    3. 2.3 RF Test Equipment Setup
  5. 3Latte Overview
    1. 3.1 Latte User Interface
    2. 3.2 Useful Latte Short-Cuts
  6. 4TRF1208-AFE7950-EVM Automatic Configuration
    1. 4.1 Steps to Start Automatic Configuration
    2. 4.2 TXDAC Evaluation
    3. 4.3 RXADC and FBADC Evaluation
  7. 5Status Check and Troubleshooting Guidelines
    1. 5.1 TRF1208-AFE7950-EVM Status Indicators
    2. 5.2 TSW14J56 EVM
  8. 6TRF1208-AFE7950-EVM Manual Configuration
    1. 6.1 TSW14J5x DAC Pattern Setup
    2. 6.2 Connect Latte to Board
    3. 6.3 Compile Libraries
    4. 6.4 Program TRF1208-AFE7950-EVM
    5. 6.5 Modify Configuration
      1. 6.5.1 Data Rate and JESD Parameters
      2. 6.5.2 Data Converter Clocks Settings
  9. 7Setup the TSW14J5x With the HSDC Pro
    1. 7.1 DAC Pattern Setup and Send
    2. 7.2 DAC Synchronization Check
    3. 7.3 ADC Data Capture
    4. 7.4 ADC Synchronization Check
  10. 8Revision History

DAC Pattern Setup and Send

This section lists the steps to create and send a DAC pattern from the TSW14J5x board.

  1. Click on the HSDC Pro DAC tab. Figure 7-1 shows a brief description of the DAC tab.
    GUID-303C2286-A9C4-4355-9885-9D1BA1222FE2-low.pngFigure 7-1 HSDC Pro DAC Tab Overview
  2. A pictorial representation to create and send a sinusoid is shown in Figure 7-2.
    GUID-BADE8529-1CD8-4DB0-9A2C-B7BC7783F758-low.pngFigure 7-2 Setup a Sinusoid
  3. How to create and send a sinusoid is outlined in the steps that follow:
    1. Select AFE79xx_2x2TX_44210 in the device-specific initialization option. Click Yes if prompted to download the firmware (FW). The default option is to run the board in the transceiver mode of operation, which enables simultaneous operation of the TX and the RX and FBRX. The FW used in transceiver mode has the letters XCVR in its name.
    2. Enter 491.52 M as the data rate and 0.9 for a scaling factor.
    3. Create a sinusoid by entering the frequency in the Tone Generator section of the HSDC Pro window.
    4. Press Send to transmit the DAC pattern to the TRF1208-AFE7950-EVM. Figure 7-3 shows the resulting message with the lane rate and reference clock expected in the FPGA. Click OK.
GUID-A1CCF569-29C8-4D09-AF62-FFBD33A2DC48-low.pngFigure 7-3 HSDC Pro Lane and Reference Clock Rate Pop-Up

Figure 7-4 shows an example setup with a 100-MHz sinusoid.

GUID-4FE6C078-B1B8-4CAE-B6D7-A74BC81931B0-low.pngFigure 7-4 HSDC Pro CW

Alternately, a pattern file (for example, LTE) can be loaded and sent using the Load External Pattern File button.

The DAC setup is now complete.